Providing a multi-phase lockstep integrity reporting mechanism
In one embodiment, a processor can enforce a blacklist and validate, according to a multi-phase lockstep integrity protocol, a device coupled to the processor. Such enforcement may prevent the device from accessing one or more resources of a system prior to the validation. The blacklist may include...
Gespeichert in:
Hauptverfasser: | , , , , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | |
container_title | |
container_volume | |
creator | GRAWROCK DAVID W STRONGIN GEOFFREY S SMITH NED M WISEMAN WILLARD M SHANBHOGUE VEDVYAS |
description | In one embodiment, a processor can enforce a blacklist and validate, according to a multi-phase lockstep integrity protocol, a device coupled to the processor. Such enforcement may prevent the device from accessing one or more resources of a system prior to the validation. The blacklist may include a list of devices that have not been validated according to the multi-phase lockstep integrity protocol. Other embodiments are described and claimed. |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US9245106B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US9245106B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US9245106B23</originalsourceid><addsrcrecordid>eNrjZLALKMovy0zJzEtXSFTILc0pydQtyEgsTlXIyU_OLi5JLVDIzCtJTS_KLKlUKEotyC8qASnNTU3OSMzLLM7lYWBNS8wpTuWF0twMCm6uIc4eukCl8anFBYnJqXmpJfGhwZZGJqaGBmZORsZEKAEARbEw_A</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Providing a multi-phase lockstep integrity reporting mechanism</title><source>esp@cenet</source><creator>GRAWROCK DAVID W ; STRONGIN GEOFFREY S ; SMITH NED M ; WISEMAN WILLARD M ; SHANBHOGUE VEDVYAS</creator><creatorcontrib>GRAWROCK DAVID W ; STRONGIN GEOFFREY S ; SMITH NED M ; WISEMAN WILLARD M ; SHANBHOGUE VEDVYAS</creatorcontrib><description>In one embodiment, a processor can enforce a blacklist and validate, according to a multi-phase lockstep integrity protocol, a device coupled to the processor. Such enforcement may prevent the device from accessing one or more resources of a system prior to the validation. The blacklist may include a list of devices that have not been validated according to the multi-phase lockstep integrity protocol. Other embodiments are described and claimed.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC COMMUNICATION TECHNIQUE ; ELECTRIC DIGITAL DATA PROCESSING ; ELECTRICITY ; PHYSICS ; TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</subject><creationdate>2016</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20160126&DB=EPODOC&CC=US&NR=9245106B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,778,883,25547,76298</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20160126&DB=EPODOC&CC=US&NR=9245106B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>GRAWROCK DAVID W</creatorcontrib><creatorcontrib>STRONGIN GEOFFREY S</creatorcontrib><creatorcontrib>SMITH NED M</creatorcontrib><creatorcontrib>WISEMAN WILLARD M</creatorcontrib><creatorcontrib>SHANBHOGUE VEDVYAS</creatorcontrib><title>Providing a multi-phase lockstep integrity reporting mechanism</title><description>In one embodiment, a processor can enforce a blacklist and validate, according to a multi-phase lockstep integrity protocol, a device coupled to the processor. Such enforcement may prevent the device from accessing one or more resources of a system prior to the validation. The blacklist may include a list of devices that have not been validated according to the multi-phase lockstep integrity protocol. Other embodiments are described and claimed.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC COMMUNICATION TECHNIQUE</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>ELECTRICITY</subject><subject>PHYSICS</subject><subject>TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2016</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLALKMovy0zJzEtXSFTILc0pydQtyEgsTlXIyU_OLi5JLVDIzCtJTS_KLKlUKEotyC8qASnNTU3OSMzLLM7lYWBNS8wpTuWF0twMCm6uIc4eukCl8anFBYnJqXmpJfGhwZZGJqaGBmZORsZEKAEARbEw_A</recordid><startdate>20160126</startdate><enddate>20160126</enddate><creator>GRAWROCK DAVID W</creator><creator>STRONGIN GEOFFREY S</creator><creator>SMITH NED M</creator><creator>WISEMAN WILLARD M</creator><creator>SHANBHOGUE VEDVYAS</creator><scope>EVB</scope></search><sort><creationdate>20160126</creationdate><title>Providing a multi-phase lockstep integrity reporting mechanism</title><author>GRAWROCK DAVID W ; STRONGIN GEOFFREY S ; SMITH NED M ; WISEMAN WILLARD M ; SHANBHOGUE VEDVYAS</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US9245106B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2016</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC COMMUNICATION TECHNIQUE</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>ELECTRICITY</topic><topic>PHYSICS</topic><topic>TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</topic><toplevel>online_resources</toplevel><creatorcontrib>GRAWROCK DAVID W</creatorcontrib><creatorcontrib>STRONGIN GEOFFREY S</creatorcontrib><creatorcontrib>SMITH NED M</creatorcontrib><creatorcontrib>WISEMAN WILLARD M</creatorcontrib><creatorcontrib>SHANBHOGUE VEDVYAS</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>GRAWROCK DAVID W</au><au>STRONGIN GEOFFREY S</au><au>SMITH NED M</au><au>WISEMAN WILLARD M</au><au>SHANBHOGUE VEDVYAS</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Providing a multi-phase lockstep integrity reporting mechanism</title><date>2016-01-26</date><risdate>2016</risdate><abstract>In one embodiment, a processor can enforce a blacklist and validate, according to a multi-phase lockstep integrity protocol, a device coupled to the processor. Such enforcement may prevent the device from accessing one or more resources of a system prior to the validation. The blacklist may include a list of devices that have not been validated according to the multi-phase lockstep integrity protocol. Other embodiments are described and claimed.</abstract><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | |
ispartof | |
issn | |
language | eng |
recordid | cdi_epo_espacenet_US9245106B2 |
source | esp@cenet |
subjects | CALCULATING COMPUTING COUNTING ELECTRIC COMMUNICATION TECHNIQUE ELECTRIC DIGITAL DATA PROCESSING ELECTRICITY PHYSICS TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION |
title | Providing a multi-phase lockstep integrity reporting mechanism |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-16T15%3A45%3A04IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=GRAWROCK%20DAVID%20W&rft.date=2016-01-26&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS9245106B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |