Compilation of HLL code with hardware accelerated functions
In an example implementation, a method is provided for compiling an HLL source file. The HLL source file checked for function calls to a set of hardware-accelerated functions having hardware implementations specified in a hardware library. For each HLL function call to a hardware-accelerated functio...
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| creator | SUN HUA HWANG L. JAMES KATHAIL VINOD K MOHAN SUNDARARAJARAO CARRILLO JORGE E |
| description | In an example implementation, a method is provided for compiling an HLL source file. The HLL source file checked for function calls to a set of hardware-accelerated functions having hardware implementations specified in a hardware library. For each HLL function call to a hardware-accelerated function, a circuit design is retrieved from the hardware library. The circuit design specifies a hardware implementation of the hardware-accelerated function. HLL interface code configured to communicate with the hardware implementation of the hardware-accelerated function is also generated. The HLL function call to the hardware-accelerated function in the HLL source file is replaced with the generated interface code. The HLL source file is compiled to generate a program executable on a processor of a programmable IC. Configuration data is generated that implements the retrieved circuit designs on the programmable circuitry of the programmable IC. |
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| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US9223921B1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US9223921B1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US9223921B13</originalsourceid><addsrcrecordid>eNrjZLB2zs8tyMxJLMnMz1PIT1Pw8PFRSM5PSVUozyzJUMhILEopTyxKVUhMTk7NSS1KLElNUUgrzUsGKS_mYWBNS8wpTuWF0twMCm6uIc4euqkF-fGpxQWJyal5qSXxocGWRkbGlkaGTobGRCgBACqMLuk</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Compilation of HLL code with hardware accelerated functions</title><source>esp@cenet</source><creator>SUN HUA ; HWANG L. JAMES ; KATHAIL VINOD K ; MOHAN SUNDARARAJARAO ; CARRILLO JORGE E</creator><creatorcontrib>SUN HUA ; HWANG L. JAMES ; KATHAIL VINOD K ; MOHAN SUNDARARAJARAO ; CARRILLO JORGE E</creatorcontrib><description>In an example implementation, a method is provided for compiling an HLL source file. The HLL source file checked for function calls to a set of hardware-accelerated functions having hardware implementations specified in a hardware library. For each HLL function call to a hardware-accelerated function, a circuit design is retrieved from the hardware library. The circuit design specifies a hardware implementation of the hardware-accelerated function. HLL interface code configured to communicate with the hardware implementation of the hardware-accelerated function is also generated. The HLL function call to the hardware-accelerated function in the HLL source file is replaced with the generated interface code. The HLL source file is compiled to generate a program executable on a processor of a programmable IC. Configuration data is generated that implements the retrieved circuit designs on the programmable circuitry of the programmable IC.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2015</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20151229&DB=EPODOC&CC=US&NR=9223921B1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25544,76293</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20151229&DB=EPODOC&CC=US&NR=9223921B1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>SUN HUA</creatorcontrib><creatorcontrib>HWANG L. JAMES</creatorcontrib><creatorcontrib>KATHAIL VINOD K</creatorcontrib><creatorcontrib>MOHAN SUNDARARAJARAO</creatorcontrib><creatorcontrib>CARRILLO JORGE E</creatorcontrib><title>Compilation of HLL code with hardware accelerated functions</title><description>In an example implementation, a method is provided for compiling an HLL source file. The HLL source file checked for function calls to a set of hardware-accelerated functions having hardware implementations specified in a hardware library. For each HLL function call to a hardware-accelerated function, a circuit design is retrieved from the hardware library. The circuit design specifies a hardware implementation of the hardware-accelerated function. HLL interface code configured to communicate with the hardware implementation of the hardware-accelerated function is also generated. The HLL function call to the hardware-accelerated function in the HLL source file is replaced with the generated interface code. The HLL source file is compiled to generate a program executable on a processor of a programmable IC. Configuration data is generated that implements the retrieved circuit designs on the programmable circuitry of the programmable IC.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2015</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLB2zs8tyMxJLMnMz1PIT1Pw8PFRSM5PSVUozyzJUMhILEopTyxKVUhMTk7NSS1KLElNUUgrzUsGKS_mYWBNS8wpTuWF0twMCm6uIc4euqkF-fGpxQWJyal5qSXxocGWRkbGlkaGTobGRCgBACqMLuk</recordid><startdate>20151229</startdate><enddate>20151229</enddate><creator>SUN HUA</creator><creator>HWANG L. JAMES</creator><creator>KATHAIL VINOD K</creator><creator>MOHAN SUNDARARAJARAO</creator><creator>CARRILLO JORGE E</creator><scope>EVB</scope></search><sort><creationdate>20151229</creationdate><title>Compilation of HLL code with hardware accelerated functions</title><author>SUN HUA ; HWANG L. JAMES ; KATHAIL VINOD K ; MOHAN SUNDARARAJARAO ; CARRILLO JORGE E</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US9223921B13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2015</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>SUN HUA</creatorcontrib><creatorcontrib>HWANG L. JAMES</creatorcontrib><creatorcontrib>KATHAIL VINOD K</creatorcontrib><creatorcontrib>MOHAN SUNDARARAJARAO</creatorcontrib><creatorcontrib>CARRILLO JORGE E</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>SUN HUA</au><au>HWANG L. JAMES</au><au>KATHAIL VINOD K</au><au>MOHAN SUNDARARAJARAO</au><au>CARRILLO JORGE E</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Compilation of HLL code with hardware accelerated functions</title><date>2015-12-29</date><risdate>2015</risdate><abstract>In an example implementation, a method is provided for compiling an HLL source file. The HLL source file checked for function calls to a set of hardware-accelerated functions having hardware implementations specified in a hardware library. For each HLL function call to a hardware-accelerated function, a circuit design is retrieved from the hardware library. The circuit design specifies a hardware implementation of the hardware-accelerated function. HLL interface code configured to communicate with the hardware implementation of the hardware-accelerated function is also generated. The HLL function call to the hardware-accelerated function in the HLL source file is replaced with the generated interface code. The HLL source file is compiled to generate a program executable on a processor of a programmable IC. Configuration data is generated that implements the retrieved circuit designs on the programmable circuitry of the programmable IC.</abstract><oa>free_for_read</oa></addata></record> |
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| subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
| title | Compilation of HLL code with hardware accelerated functions |
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