Fail safe circuit
Apparatus for preventing output of an input signal is disclosed. The apparatus comprises a signal control unit comprising a signal buffering unit having an input and an output, the signal buffering unit arranged to receive an input signal and pass the input signal to the output when the signal buffe...
Gespeichert in:
Hauptverfasser: | , , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | |
container_title | |
container_volume | |
creator | WAIN RICHARD MARK HARGIS COLIN SYKES ANDREW JEREMY |
description | Apparatus for preventing output of an input signal is disclosed. The apparatus comprises a signal control unit comprising a signal buffering unit having an input and an output, the signal buffering unit arranged to receive an input signal and pass the input signal to the output when the signal buffering unit is powered, wherein a negative power supply terminal of the signal buffering unit is arranged to be supplied by a first power source having a voltage. The signal control unit also comprises a boost circuit arranged to boost the voltage of the first power source to a boosted voltage higher than the voltage of the first power source and supply either the voltage of the first power source or the boosted voltage to a positive power supply terminal of the signal buffering unit. The signal buffering unit is powered when the boosted voltage is supplied to the positive power supply terminal of the signal buffering unit and the signal buffering unit is not powered when voltage of the first power supply terminal is supplied to the positive power supply terminal of the signal buffering unit. Also disclosed is an apparatus for providing output voltages for driving a motor as well as a motor drive system. |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US9209718B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US9209718B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US9209718B23</originalsourceid><addsrcrecordid>eNrjZBB0S8zMUShOTEtVSM4sSi7NLOFhYE1LzClO5YXS3AwKbq4hzh66qQX58anFBYnJqXmpJfGhwZZGBpbmhhZORsZEKAEAe0ofIA</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Fail safe circuit</title><source>esp@cenet</source><creator>WAIN RICHARD MARK ; HARGIS COLIN ; SYKES ANDREW JEREMY</creator><creatorcontrib>WAIN RICHARD MARK ; HARGIS COLIN ; SYKES ANDREW JEREMY</creatorcontrib><description>Apparatus for preventing output of an input signal is disclosed. The apparatus comprises a signal control unit comprising a signal buffering unit having an input and an output, the signal buffering unit arranged to receive an input signal and pass the input signal to the output when the signal buffering unit is powered, wherein a negative power supply terminal of the signal buffering unit is arranged to be supplied by a first power source having a voltage. The signal control unit also comprises a boost circuit arranged to boost the voltage of the first power source to a boosted voltage higher than the voltage of the first power source and supply either the voltage of the first power source or the boosted voltage to a positive power supply terminal of the signal buffering unit. The signal buffering unit is powered when the boosted voltage is supplied to the positive power supply terminal of the signal buffering unit and the signal buffering unit is not powered when voltage of the first power supply terminal is supplied to the positive power supply terminal of the signal buffering unit. Also disclosed is an apparatus for providing output voltages for driving a motor as well as a motor drive system.</description><language>eng</language><subject>APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC,OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWERSUPPLY SYSTEMS ; BASIC ELECTRONIC CIRCUITRY ; CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORSOR DYNAMO-ELECTRIC CONVERTERS ; CONTROL OR REGULATION THEREOF ; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS ; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUTPOWER ; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER ; ELECTRICITY ; EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS ; GENERATION ; PULSE TECHNIQUE</subject><creationdate>2015</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20151208&DB=EPODOC&CC=US&NR=9209718B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20151208&DB=EPODOC&CC=US&NR=9209718B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>WAIN RICHARD MARK</creatorcontrib><creatorcontrib>HARGIS COLIN</creatorcontrib><creatorcontrib>SYKES ANDREW JEREMY</creatorcontrib><title>Fail safe circuit</title><description>Apparatus for preventing output of an input signal is disclosed. The apparatus comprises a signal control unit comprising a signal buffering unit having an input and an output, the signal buffering unit arranged to receive an input signal and pass the input signal to the output when the signal buffering unit is powered, wherein a negative power supply terminal of the signal buffering unit is arranged to be supplied by a first power source having a voltage. The signal control unit also comprises a boost circuit arranged to boost the voltage of the first power source to a boosted voltage higher than the voltage of the first power source and supply either the voltage of the first power source or the boosted voltage to a positive power supply terminal of the signal buffering unit. The signal buffering unit is powered when the boosted voltage is supplied to the positive power supply terminal of the signal buffering unit and the signal buffering unit is not powered when voltage of the first power supply terminal is supplied to the positive power supply terminal of the signal buffering unit. Also disclosed is an apparatus for providing output voltages for driving a motor as well as a motor drive system.</description><subject>APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC,OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWERSUPPLY SYSTEMS</subject><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORSOR DYNAMO-ELECTRIC CONVERTERS</subject><subject>CONTROL OR REGULATION THEREOF</subject><subject>CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS</subject><subject>CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUTPOWER</subject><subject>CONVERSION OR DISTRIBUTION OF ELECTRIC POWER</subject><subject>ELECTRICITY</subject><subject>EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS</subject><subject>GENERATION</subject><subject>PULSE TECHNIQUE</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2015</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZBB0S8zMUShOTEtVSM4sSi7NLOFhYE1LzClO5YXS3AwKbq4hzh66qQX58anFBYnJqXmpJfGhwZZGBpbmhhZORsZEKAEAe0ofIA</recordid><startdate>20151208</startdate><enddate>20151208</enddate><creator>WAIN RICHARD MARK</creator><creator>HARGIS COLIN</creator><creator>SYKES ANDREW JEREMY</creator><scope>EVB</scope></search><sort><creationdate>20151208</creationdate><title>Fail safe circuit</title><author>WAIN RICHARD MARK ; HARGIS COLIN ; SYKES ANDREW JEREMY</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US9209718B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2015</creationdate><topic>APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC,OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWERSUPPLY SYSTEMS</topic><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORSOR DYNAMO-ELECTRIC CONVERTERS</topic><topic>CONTROL OR REGULATION THEREOF</topic><topic>CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS</topic><topic>CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUTPOWER</topic><topic>CONVERSION OR DISTRIBUTION OF ELECTRIC POWER</topic><topic>ELECTRICITY</topic><topic>EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS</topic><topic>GENERATION</topic><topic>PULSE TECHNIQUE</topic><toplevel>online_resources</toplevel><creatorcontrib>WAIN RICHARD MARK</creatorcontrib><creatorcontrib>HARGIS COLIN</creatorcontrib><creatorcontrib>SYKES ANDREW JEREMY</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>WAIN RICHARD MARK</au><au>HARGIS COLIN</au><au>SYKES ANDREW JEREMY</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Fail safe circuit</title><date>2015-12-08</date><risdate>2015</risdate><abstract>Apparatus for preventing output of an input signal is disclosed. The apparatus comprises a signal control unit comprising a signal buffering unit having an input and an output, the signal buffering unit arranged to receive an input signal and pass the input signal to the output when the signal buffering unit is powered, wherein a negative power supply terminal of the signal buffering unit is arranged to be supplied by a first power source having a voltage. The signal control unit also comprises a boost circuit arranged to boost the voltage of the first power source to a boosted voltage higher than the voltage of the first power source and supply either the voltage of the first power source or the boosted voltage to a positive power supply terminal of the signal buffering unit. The signal buffering unit is powered when the boosted voltage is supplied to the positive power supply terminal of the signal buffering unit and the signal buffering unit is not powered when voltage of the first power supply terminal is supplied to the positive power supply terminal of the signal buffering unit. Also disclosed is an apparatus for providing output voltages for driving a motor as well as a motor drive system.</abstract><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | |
ispartof | |
issn | |
language | eng |
recordid | cdi_epo_espacenet_US9209718B2 |
source | esp@cenet |
subjects | APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC,OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWERSUPPLY SYSTEMS BASIC ELECTRONIC CIRCUITRY CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORSOR DYNAMO-ELECTRIC CONVERTERS CONTROL OR REGULATION THEREOF CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUTPOWER CONVERSION OR DISTRIBUTION OF ELECTRIC POWER ELECTRICITY EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS GENERATION PULSE TECHNIQUE |
title | Fail safe circuit |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-03T22%3A26%3A16IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=WAIN%20RICHARD%20MARK&rft.date=2015-12-08&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS9209718B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |