Method including an etching of a portion of an interlayer dielectric in a semiconductor structure, a degas process and a preclean process

A method includes providing a semiconductor structure. The semiconductor structure includes a substrate having a frontside and a backside, an electrically conductive feature including copper provided at the frontside of the substrate and a low-k interlayer dielectric provided over the electrically c...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: HINTZE BERND, KOSCHINSKY FRANK, WITNIK OLIVER
Format: Patent
Sprache:eng
Schlagworte:
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