Data path acceleration using HW virtualization
A processing core includes a packet classifier, implemented in a single processing core, configured to classify incoming data packets into first data packets of a known data packet flow and into second data packets of an unknown data packet flow, a first path thread, implemented in the single proces...
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creator | KARDASHOV TIMOR KOVALENKO MAXIM |
description | A processing core includes a packet classifier, implemented in a single processing core, configured to classify incoming data packets into first data packets of a known data packet flow and into second data packets of an unknown data packet flow, a first path thread, implemented in the single processing core, configured to process ones of the first data packets at least by forwarding the first data packets to a destination that corresponds to a previously determined destination associated with the known data packet flow, and a second path thread, implemented in the single processing core, configured to process a received second data packet at least to determine a new data packet flow for the second data packet. |
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subjects | ELECTRIC COMMUNICATION TECHNIQUE ELECTRICITY TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION |
title | Data path acceleration using HW virtualization |
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