Method and system for forward error correction of interleaved-formated data

In one embodiment, a device is provided. The device includes a first formatting circuit configured to add zero padding bits to a received data block. An FEC encoder circuit is coupled to the first formatting circuit and is configured to determine parity bits for the data block at a first code rate....

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Bibliographische Detailangaben
Hauptverfasser: RAO RAGHAVENDAR M, MAZAHREH RAIED N
Format: Patent
Sprache:eng
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