Memory system capable of calibrating output voltage level of semiconductor memory device and method of calibrating output voltage level of semiconductor memory device
Provided are a semiconductor memory device and a memory system including the same, which may calibrate a level of an output voltage in consideration of channel environment and a mismatch in on-die termination (ODT) resistance of a memory controller. The memory system includes a memory controller and...
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| creator | JEON YOUNG-JIN EOM YOON-JOO BAE YONGOL CHO YOUNGUL |
| description | Provided are a semiconductor memory device and a memory system including the same, which may calibrate a level of an output voltage in consideration of channel environment and a mismatch in on-die termination (ODT) resistance of a memory controller. The memory system includes a memory controller and a semiconductor memory device. The semiconductor memory device is configured to generate a reference voltage based on driving information of the memory controller, and calibrate an output voltage level based on a reference voltage when the semiconductor memory device is electrically connected to the memory controller. |
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| subjects | BASIC ELECTRONIC CIRCUITRY ELECTRICITY INFORMATION STORAGE PHYSICS PULSE TECHNIQUE STATIC STORES |
| title | Memory system capable of calibrating output voltage level of semiconductor memory device and method of calibrating output voltage level of semiconductor memory device |
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