Method and apparatus for diagnosing an integrated circuit

Method and apparatus for diagnosing an integrated circuit

System and method for diagnosing failures within an integrated circuit is provided. In an embodiment, the apparatus includes a diagnostic cell coupled in series with a buffer chain. The diagnostic cell includes a plurality of logic operators that when activated invert a signal received from the buff...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: TONG KIN LAM, CHANGCHIEN WEI-PIN, LIU CHINOU
Format: Patent
Sprache:eng
Schlagworte:
MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
TESTING
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator TONG KIN LAM
CHANGCHIEN WEI-PIN
LIU CHINOU
description System and method for diagnosing failures within an integrated circuit is provided. In an embodiment, the apparatus includes a diagnostic cell coupled in series with a buffer chain. The diagnostic cell includes a plurality of logic operators that when activated invert a signal received from the buffer chain. The inversion of the signal from the buffer chain allows the diagnostic cell to determine the location of a failure within an integrated circuit previously determined by a scan chain design for test methodology to contain a failure.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US9097762B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US9097762B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US9097762B23</originalsourceid><addsrcrecordid>eNrjZLD0TS3JyE9RSMwD4oKCxKLEktJihbT8IoWUzMT0vPzizLx0oKRCZl5JajpQMjVFITmzKLk0s4SHgTUtMac4lRdKczMouLmGOHvophbkx6cWFyQmp-allsSHBlsaWJqbmxk5GRkToQQA7c8umg</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Method and apparatus for diagnosing an integrated circuit</title><source>esp@cenet</source><creator>TONG KIN LAM ; CHANGCHIEN WEI-PIN ; LIU CHINOU</creator><creatorcontrib>TONG KIN LAM ; CHANGCHIEN WEI-PIN ; LIU CHINOU</creatorcontrib><description>System and method for diagnosing failures within an integrated circuit is provided. In an embodiment, the apparatus includes a diagnostic cell coupled in series with a buffer chain. The diagnostic cell includes a plurality of logic operators that when activated invert a signal received from the buffer chain. The inversion of the signal from the buffer chain allows the diagnostic cell to determine the location of a failure within an integrated circuit previously determined by a scan chain design for test methodology to contain a failure.</description><language>eng</language><subject>MEASURING ; MEASURING ELECTRIC VARIABLES ; MEASURING MAGNETIC VARIABLES ; PHYSICS ; TESTING</subject><creationdate>2015</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20150804&amp;DB=EPODOC&amp;CC=US&amp;NR=9097762B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20150804&amp;DB=EPODOC&amp;CC=US&amp;NR=9097762B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>TONG KIN LAM</creatorcontrib><creatorcontrib>CHANGCHIEN WEI-PIN</creatorcontrib><creatorcontrib>LIU CHINOU</creatorcontrib><title>Method and apparatus for diagnosing an integrated circuit</title><description>System and method for diagnosing failures within an integrated circuit is provided. In an embodiment, the apparatus includes a diagnostic cell coupled in series with a buffer chain. The diagnostic cell includes a plurality of logic operators that when activated invert a signal received from the buffer chain. The inversion of the signal from the buffer chain allows the diagnostic cell to determine the location of a failure within an integrated circuit previously determined by a scan chain design for test methodology to contain a failure.</description><subject>MEASURING</subject><subject>MEASURING ELECTRIC VARIABLES</subject><subject>MEASURING MAGNETIC VARIABLES</subject><subject>PHYSICS</subject><subject>TESTING</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2015</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLD0TS3JyE9RSMwD4oKCxKLEktJihbT8IoWUzMT0vPzizLx0oKRCZl5JajpQMjVFITmzKLk0s4SHgTUtMac4lRdKczMouLmGOHvophbkx6cWFyQmp-allsSHBlsaWJqbmxk5GRkToQQA7c8umg</recordid><startdate>20150804</startdate><enddate>20150804</enddate><creator>TONG KIN LAM</creator><creator>CHANGCHIEN WEI-PIN</creator><creator>LIU CHINOU</creator><scope>EVB</scope></search><sort><creationdate>20150804</creationdate><title>Method and apparatus for diagnosing an integrated circuit</title><author>TONG KIN LAM ; CHANGCHIEN WEI-PIN ; LIU CHINOU</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US9097762B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2015</creationdate><topic>MEASURING</topic><topic>MEASURING ELECTRIC VARIABLES</topic><topic>MEASURING MAGNETIC VARIABLES</topic><topic>PHYSICS</topic><topic>TESTING</topic><toplevel>online_resources</toplevel><creatorcontrib>TONG KIN LAM</creatorcontrib><creatorcontrib>CHANGCHIEN WEI-PIN</creatorcontrib><creatorcontrib>LIU CHINOU</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>TONG KIN LAM</au><au>CHANGCHIEN WEI-PIN</au><au>LIU CHINOU</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Method and apparatus for diagnosing an integrated circuit</title><date>2015-08-04</date><risdate>2015</risdate><abstract>System and method for diagnosing failures within an integrated circuit is provided. In an embodiment, the apparatus includes a diagnostic cell coupled in series with a buffer chain. The diagnostic cell includes a plurality of logic operators that when activated invert a signal received from the buffer chain. The inversion of the signal from the buffer chain allows the diagnostic cell to determine the location of a failure within an integrated circuit previously determined by a scan chain design for test methodology to contain a failure.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US9097762B2
source esp@cenet
subjects MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
TESTING
title Method and apparatus for diagnosing an integrated circuit
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-31T14%3A10%3A02IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=TONG%20KIN%20LAM&rft.date=2015-08-04&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS9097762B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true