Semiconductor device
Stress relief layers are each provided on each circuit on an insulating substrate in a semiconductor module; a metal base coming into contact with the semiconductor module is divided into a thinned and low stiffened first metal base and a thickened and high stiffened second metal base; and the semic...
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| creator | BESSHI NORIYUKI ISHII RYUICHI |
| description | Stress relief layers are each provided on each circuit on an insulating substrate in a semiconductor module; a metal base coming into contact with the semiconductor module is divided into a thinned and low stiffened first metal base and a thickened and high stiffened second metal base; and the semiconductor module is bonded to the first metal base and then the first and the second metal bases are bonded to be integrated. |
| format | Patent |
| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US9018756B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US9018756B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US9018756B23</originalsourceid><addsrcrecordid>eNrjZBAJTs3NTM7PSylNLskvUkhJLctMTuVhYE1LzClO5YXS3AwKbq4hzh66qQX58anFBYnJqXmpJfGhwZYGhhbmpmZORsZEKAEAJnYgxA</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Semiconductor device</title><source>esp@cenet</source><creator>BESSHI NORIYUKI ; ISHII RYUICHI</creator><creatorcontrib>BESSHI NORIYUKI ; ISHII RYUICHI</creatorcontrib><description>Stress relief layers are each provided on each circuit on an insulating substrate in a semiconductor module; a metal base coming into contact with the semiconductor module is divided into a thinned and low stiffened first metal base and a thickened and high stiffened second metal base; and the semiconductor module is bonded to the first metal base and then the first and the second metal bases are bonded to be integrated.</description><language>eng</language><subject>ARTIFICIAL STONE ; BASIC ELECTRIC ELEMENTS ; CEMENTS ; CERAMICS ; CHEMISTRY ; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDINGMATERIALS ; CONCRETE ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; LIME, MAGNESIA ; METALLURGY ; REFRACTORIES ; SEMICONDUCTOR DEVICES ; SLAG ; TREATMENT OF NATURAL STONE</subject><creationdate>2015</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20150428&DB=EPODOC&CC=US&NR=9018756B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20150428&DB=EPODOC&CC=US&NR=9018756B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>BESSHI NORIYUKI</creatorcontrib><creatorcontrib>ISHII RYUICHI</creatorcontrib><title>Semiconductor device</title><description>Stress relief layers are each provided on each circuit on an insulating substrate in a semiconductor module; a metal base coming into contact with the semiconductor module is divided into a thinned and low stiffened first metal base and a thickened and high stiffened second metal base; and the semiconductor module is bonded to the first metal base and then the first and the second metal bases are bonded to be integrated.</description><subject>ARTIFICIAL STONE</subject><subject>BASIC ELECTRIC ELEMENTS</subject><subject>CEMENTS</subject><subject>CERAMICS</subject><subject>CHEMISTRY</subject><subject>COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDINGMATERIALS</subject><subject>CONCRETE</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>LIME, MAGNESIA</subject><subject>METALLURGY</subject><subject>REFRACTORIES</subject><subject>SEMICONDUCTOR DEVICES</subject><subject>SLAG</subject><subject>TREATMENT OF NATURAL STONE</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2015</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZBAJTs3NTM7PSylNLskvUkhJLctMTuVhYE1LzClO5YXS3AwKbq4hzh66qQX58anFBYnJqXmpJfGhwZYGhhbmpmZORsZEKAEAJnYgxA</recordid><startdate>20150428</startdate><enddate>20150428</enddate><creator>BESSHI NORIYUKI</creator><creator>ISHII RYUICHI</creator><scope>EVB</scope></search><sort><creationdate>20150428</creationdate><title>Semiconductor device</title><author>BESSHI NORIYUKI ; ISHII RYUICHI</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US9018756B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2015</creationdate><topic>ARTIFICIAL STONE</topic><topic>BASIC ELECTRIC ELEMENTS</topic><topic>CEMENTS</topic><topic>CERAMICS</topic><topic>CHEMISTRY</topic><topic>COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDINGMATERIALS</topic><topic>CONCRETE</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>LIME, MAGNESIA</topic><topic>METALLURGY</topic><topic>REFRACTORIES</topic><topic>SEMICONDUCTOR DEVICES</topic><topic>SLAG</topic><topic>TREATMENT OF NATURAL STONE</topic><toplevel>online_resources</toplevel><creatorcontrib>BESSHI NORIYUKI</creatorcontrib><creatorcontrib>ISHII RYUICHI</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>BESSHI NORIYUKI</au><au>ISHII RYUICHI</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Semiconductor device</title><date>2015-04-28</date><risdate>2015</risdate><abstract>Stress relief layers are each provided on each circuit on an insulating substrate in a semiconductor module; a metal base coming into contact with the semiconductor module is divided into a thinned and low stiffened first metal base and a thickened and high stiffened second metal base; and the semiconductor module is bonded to the first metal base and then the first and the second metal bases are bonded to be integrated.</abstract><oa>free_for_read</oa></addata></record> |
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| language | eng |
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| subjects | ARTIFICIAL STONE BASIC ELECTRIC ELEMENTS CEMENTS CERAMICS CHEMISTRY COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDINGMATERIALS CONCRETE ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY LIME, MAGNESIA METALLURGY REFRACTORIES SEMICONDUCTOR DEVICES SLAG TREATMENT OF NATURAL STONE |
| title | Semiconductor device |
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