Method of manufacturing a non-volatile memory

The disclosure relates to a method of manufacturing vertical gate transistors in a semiconductor substrate, comprising implanting, in the depth of the substrate, a doped isolation layer, to form a source region of the transistors; forming, in the substrate, parallel trench isolations and second tren...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	NIEL STEPHAN, REGNIER ARNAUD, LA ROSA FRANCESCO, DALLE-HOUILLIEZ HÉLÈNE
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY INFORMATION STORAGE PHYSICS SEMICONDUCTOR DEVICES STATIC STORES
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