Interleaving ejector latches enabling a reduced end-to-end spacing between memory module connectors

First and second memory module connectors are secured in end-to-end alignment on a circuit board for receiving memory modules along a central plane. Each memory module connector has an ejector latch pivotally coupled to the adjacent ends of the memory module connectors to pivot about an axis perpend...

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Hauptverfasser: XU JEAN J, KERRIGAN BRIAN M, MESERTH TIMOTHY A, SASS TONY C
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creator XU JEAN J
KERRIGAN BRIAN M
MESERTH TIMOTHY A
SASS TONY C
description First and second memory module connectors are secured in end-to-end alignment on a circuit board for receiving memory modules along a central plane. Each memory module connector has an ejector latch pivotally coupled to the adjacent ends of the memory module connectors to pivot about an axis perpendicular to the plane. A distal portion of an upper arm of each ejector latch lies on opposite sides of the plane, such that the ejector latches interleave when either ejector latch is pivoted to an open position. The adjacent ends of the first and second memory module connectors are separated by a narrow gap, such that pivoting of the either ejector latch from a closed position to an open position will push the other ejector latch toward a closed position.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US8979561B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US8979561B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US8979561B23</originalsourceid><addsrcrecordid>eNqNjDsOwjAQBdNQIOAOewEXgPikBYGgBurIWb_wkb2ObAfE7YkRB6Aa6c3TDAs-SkKw0M-7XAkPcPKBrE58QySIrm0WmgJMxzD9ZFTyqgfFVnOWNdILEHJwPrzJedNZEHuRby2Oi0GjbcTkx1FB-915e1BofYVcgSBVl9O6XJWL5XQzm_9x-QBGCT6i</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Interleaving ejector latches enabling a reduced end-to-end spacing between memory module connectors</title><source>esp@cenet</source><creator>XU JEAN J ; KERRIGAN BRIAN M ; MESERTH TIMOTHY A ; SASS TONY C</creator><creatorcontrib>XU JEAN J ; KERRIGAN BRIAN M ; MESERTH TIMOTHY A ; SASS TONY C</creatorcontrib><description>First and second memory module connectors are secured in end-to-end alignment on a circuit board for receiving memory modules along a central plane. Each memory module connector has an ejector latch pivotally coupled to the adjacent ends of the memory module connectors to pivot about an axis perpendicular to the plane. A distal portion of an upper arm of each ejector latch lies on opposite sides of the plane, such that the ejector latches interleave when either ejector latch is pivoted to an open position. The adjacent ends of the first and second memory module connectors are separated by a narrow gap, such that pivoting of the either ejector latch from a closed position to an open position will push the other ejector latch toward a closed position.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; CURRENT COLLECTORS ; ELECTRICITY ; LINE CONNECTORS</subject><creationdate>2015</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20150317&amp;DB=EPODOC&amp;CC=US&amp;NR=8979561B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,777,882,25545,76296</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20150317&amp;DB=EPODOC&amp;CC=US&amp;NR=8979561B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>XU JEAN J</creatorcontrib><creatorcontrib>KERRIGAN BRIAN M</creatorcontrib><creatorcontrib>MESERTH TIMOTHY A</creatorcontrib><creatorcontrib>SASS TONY C</creatorcontrib><title>Interleaving ejector latches enabling a reduced end-to-end spacing between memory module connectors</title><description>First and second memory module connectors are secured in end-to-end alignment on a circuit board for receiving memory modules along a central plane. Each memory module connector has an ejector latch pivotally coupled to the adjacent ends of the memory module connectors to pivot about an axis perpendicular to the plane. A distal portion of an upper arm of each ejector latch lies on opposite sides of the plane, such that the ejector latches interleave when either ejector latch is pivoted to an open position. The adjacent ends of the first and second memory module connectors are separated by a narrow gap, such that pivoting of the either ejector latch from a closed position to an open position will push the other ejector latch toward a closed position.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>CURRENT COLLECTORS</subject><subject>ELECTRICITY</subject><subject>LINE CONNECTORS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2015</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNjDsOwjAQBdNQIOAOewEXgPikBYGgBurIWb_wkb2ObAfE7YkRB6Aa6c3TDAs-SkKw0M-7XAkPcPKBrE58QySIrm0WmgJMxzD9ZFTyqgfFVnOWNdILEHJwPrzJedNZEHuRby2Oi0GjbcTkx1FB-915e1BofYVcgSBVl9O6XJWL5XQzm_9x-QBGCT6i</recordid><startdate>20150317</startdate><enddate>20150317</enddate><creator>XU JEAN J</creator><creator>KERRIGAN BRIAN M</creator><creator>MESERTH TIMOTHY A</creator><creator>SASS TONY C</creator><scope>EVB</scope></search><sort><creationdate>20150317</creationdate><title>Interleaving ejector latches enabling a reduced end-to-end spacing between memory module connectors</title><author>XU JEAN J ; KERRIGAN BRIAN M ; MESERTH TIMOTHY A ; SASS TONY C</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US8979561B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2015</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>CURRENT COLLECTORS</topic><topic>ELECTRICITY</topic><topic>LINE CONNECTORS</topic><toplevel>online_resources</toplevel><creatorcontrib>XU JEAN J</creatorcontrib><creatorcontrib>KERRIGAN BRIAN M</creatorcontrib><creatorcontrib>MESERTH TIMOTHY A</creatorcontrib><creatorcontrib>SASS TONY C</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>XU JEAN J</au><au>KERRIGAN BRIAN M</au><au>MESERTH TIMOTHY A</au><au>SASS TONY C</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Interleaving ejector latches enabling a reduced end-to-end spacing between memory module connectors</title><date>2015-03-17</date><risdate>2015</risdate><abstract>First and second memory module connectors are secured in end-to-end alignment on a circuit board for receiving memory modules along a central plane. Each memory module connector has an ejector latch pivotally coupled to the adjacent ends of the memory module connectors to pivot about an axis perpendicular to the plane. A distal portion of an upper arm of each ejector latch lies on opposite sides of the plane, such that the ejector latches interleave when either ejector latch is pivoted to an open position. The adjacent ends of the first and second memory module connectors are separated by a narrow gap, such that pivoting of the either ejector latch from a closed position to an open position will push the other ejector latch toward a closed position.</abstract><oa>free_for_read</oa></addata></record>
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subjects BASIC ELECTRIC ELEMENTS
CURRENT COLLECTORS
ELECTRICITY
LINE CONNECTORS
title Interleaving ejector latches enabling a reduced end-to-end spacing between memory module connectors
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-18T13%3A38%3A05IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=XU%20JEAN%20J&rft.date=2015-03-17&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS8979561B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true