Semiconductor device having a test pad connected to an exposed pad

A semiconductor device includes a circuit board including a ground portion, and a semiconductor package disposed on the circuit board. The semiconductor package includes an external connecting pad and an exposed pad. The exposed pad and the ground portion are electrically connected at a first surfac...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: JEON BYUNG-KIL, KIM YONG-BUM, JUN BONG-JU, YEO DONG-HYUN
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator JEON BYUNG-KIL
KIM YONG-BUM
JUN BONG-JU
YEO DONG-HYUN
description A semiconductor device includes a circuit board including a ground portion, and a semiconductor package disposed on the circuit board. The semiconductor package includes an external connecting pad and an exposed pad. The exposed pad and the ground portion are electrically connected at a first surface of the exposed pad. A semiconductor chip is disposed on a second surface of the exposed pad and electrically connected to the external connecting pad. The first surface of the exposed pad is located external to the semiconductor package, and the second surface of the exposed pad is located within the semiconductor package. A test pad is disposed on the semiconductor chip and is electrically connected to the exposed pad.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US8963150B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US8963150B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US8963150B23</originalsourceid><addsrcrecordid>eNqNikEOAUEQRXtjIbhDXUCCCWE7QuyH9aRS_dEJVR1dJo6vFw5g9fLy3ji0HZ5JTONb3F4UMSQB3XlIeiMmR3HKHKkuCnFEciNWwidbqVbbNIyu_CiY_TgJdDyc96c5svUomQUK7y_ddrdplutFu2r-WL6_rTFv</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Semiconductor device having a test pad connected to an exposed pad</title><source>esp@cenet</source><creator>JEON BYUNG-KIL ; KIM YONG-BUM ; JUN BONG-JU ; YEO DONG-HYUN</creator><creatorcontrib>JEON BYUNG-KIL ; KIM YONG-BUM ; JUN BONG-JU ; YEO DONG-HYUN</creatorcontrib><description>A semiconductor device includes a circuit board including a ground portion, and a semiconductor package disposed on the circuit board. The semiconductor package includes an external connecting pad and an exposed pad. The exposed pad and the ground portion are electrically connected at a first surface of the exposed pad. A semiconductor chip is disposed on a second surface of the exposed pad and electrically connected to the external connecting pad. The first surface of the exposed pad is located external to the semiconductor package, and the second surface of the exposed pad is located within the semiconductor package. A test pad is disposed on the semiconductor chip and is electrically connected to the exposed pad.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; MEASURING ; MEASURING ELECTRIC VARIABLES ; MEASURING MAGNETIC VARIABLES ; PHYSICS ; SEMICONDUCTOR DEVICES ; TESTING</subject><creationdate>2015</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20150224&amp;DB=EPODOC&amp;CC=US&amp;NR=8963150B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,778,883,25551,76302</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20150224&amp;DB=EPODOC&amp;CC=US&amp;NR=8963150B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>JEON BYUNG-KIL</creatorcontrib><creatorcontrib>KIM YONG-BUM</creatorcontrib><creatorcontrib>JUN BONG-JU</creatorcontrib><creatorcontrib>YEO DONG-HYUN</creatorcontrib><title>Semiconductor device having a test pad connected to an exposed pad</title><description>A semiconductor device includes a circuit board including a ground portion, and a semiconductor package disposed on the circuit board. The semiconductor package includes an external connecting pad and an exposed pad. The exposed pad and the ground portion are electrically connected at a first surface of the exposed pad. A semiconductor chip is disposed on a second surface of the exposed pad and electrically connected to the external connecting pad. The first surface of the exposed pad is located external to the semiconductor package, and the second surface of the exposed pad is located within the semiconductor package. A test pad is disposed on the semiconductor chip and is electrically connected to the exposed pad.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>MEASURING</subject><subject>MEASURING ELECTRIC VARIABLES</subject><subject>MEASURING MAGNETIC VARIABLES</subject><subject>PHYSICS</subject><subject>SEMICONDUCTOR DEVICES</subject><subject>TESTING</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2015</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNikEOAUEQRXtjIbhDXUCCCWE7QuyH9aRS_dEJVR1dJo6vFw5g9fLy3ji0HZ5JTONb3F4UMSQB3XlIeiMmR3HKHKkuCnFEciNWwidbqVbbNIyu_CiY_TgJdDyc96c5svUomQUK7y_ddrdplutFu2r-WL6_rTFv</recordid><startdate>20150224</startdate><enddate>20150224</enddate><creator>JEON BYUNG-KIL</creator><creator>KIM YONG-BUM</creator><creator>JUN BONG-JU</creator><creator>YEO DONG-HYUN</creator><scope>EVB</scope></search><sort><creationdate>20150224</creationdate><title>Semiconductor device having a test pad connected to an exposed pad</title><author>JEON BYUNG-KIL ; KIM YONG-BUM ; JUN BONG-JU ; YEO DONG-HYUN</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US8963150B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2015</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>MEASURING</topic><topic>MEASURING ELECTRIC VARIABLES</topic><topic>MEASURING MAGNETIC VARIABLES</topic><topic>PHYSICS</topic><topic>SEMICONDUCTOR DEVICES</topic><topic>TESTING</topic><toplevel>online_resources</toplevel><creatorcontrib>JEON BYUNG-KIL</creatorcontrib><creatorcontrib>KIM YONG-BUM</creatorcontrib><creatorcontrib>JUN BONG-JU</creatorcontrib><creatorcontrib>YEO DONG-HYUN</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>JEON BYUNG-KIL</au><au>KIM YONG-BUM</au><au>JUN BONG-JU</au><au>YEO DONG-HYUN</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Semiconductor device having a test pad connected to an exposed pad</title><date>2015-02-24</date><risdate>2015</risdate><abstract>A semiconductor device includes a circuit board including a ground portion, and a semiconductor package disposed on the circuit board. The semiconductor package includes an external connecting pad and an exposed pad. The exposed pad and the ground portion are electrically connected at a first surface of the exposed pad. A semiconductor chip is disposed on a second surface of the exposed pad and electrically connected to the external connecting pad. The first surface of the exposed pad is located external to the semiconductor package, and the second surface of the exposed pad is located within the semiconductor package. A test pad is disposed on the semiconductor chip and is electrically connected to the exposed pad.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US8963150B2
source esp@cenet
subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
MEASURING
MEASURING ELECTRIC VARIABLES
MEASURING MAGNETIC VARIABLES
PHYSICS
SEMICONDUCTOR DEVICES
TESTING
title Semiconductor device having a test pad connected to an exposed pad
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-16T02%3A03%3A13IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=JEON%20BYUNG-KIL&rft.date=2015-02-24&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS8963150B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true