Integrated nano-farad capacitors and method of formation

A high value capacitance per unit area capacitor is fabricated on a substrate 1 by converting a portion of a primary function anti-reflecting conducting layer 36 to a high value dielectric layer 37 by partially oxidizing the conducting layer to form the dielectric layer. The resultant combination is...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
1. Verfasser: WANG JAMES JEN-HO
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator WANG JAMES JEN-HO
description A high value capacitance per unit area capacitor is fabricated on a substrate 1 by converting a portion of a primary function anti-reflecting conducting layer 36 to a high value dielectric layer 37 by partially oxidizing the conducting layer to form the dielectric layer. The resultant combination is sandwiched between two metal layer electrodes 35 and 55 to complete the capacitor structure.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US8890287B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US8890287B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US8890287B23</originalsourceid><addsrcrecordid>eNrjZLDwzCtJTS9KLElNUchLzMvXTUssSkxRSE4sSEzOLMkvKlZIzEtRyE0tychPUchPU0jLL8pNLMnMz-NhYE1LzClO5YXS3AwKbq4hzh66qQX58anFQO2peakl8aHBFhaWBkYW5k5GxkQoAQCyii4k</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Integrated nano-farad capacitors and method of formation</title><source>esp@cenet</source><creator>WANG JAMES JEN-HO</creator><creatorcontrib>WANG JAMES JEN-HO</creatorcontrib><description>A high value capacitance per unit area capacitor is fabricated on a substrate 1 by converting a portion of a primary function anti-reflecting conducting layer 36 to a high value dielectric layer 37 by partially oxidizing the conducting layer to form the dielectric layer. The resultant combination is sandwiched between two metal layer electrodes 35 and 55 to complete the capacitor structure.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2014</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20141118&amp;DB=EPODOC&amp;CC=US&amp;NR=8890287B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20141118&amp;DB=EPODOC&amp;CC=US&amp;NR=8890287B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>WANG JAMES JEN-HO</creatorcontrib><title>Integrated nano-farad capacitors and method of formation</title><description>A high value capacitance per unit area capacitor is fabricated on a substrate 1 by converting a portion of a primary function anti-reflecting conducting layer 36 to a high value dielectric layer 37 by partially oxidizing the conducting layer to form the dielectric layer. The resultant combination is sandwiched between two metal layer electrodes 35 and 55 to complete the capacitor structure.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2014</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLDwzCtJTS9KLElNUchLzMvXTUssSkxRSE4sSEzOLMkvKlZIzEtRyE0tychPUchPU0jLL8pNLMnMz-NhYE1LzClO5YXS3AwKbq4hzh66qQX58anFQO2peakl8aHBFhaWBkYW5k5GxkQoAQCyii4k</recordid><startdate>20141118</startdate><enddate>20141118</enddate><creator>WANG JAMES JEN-HO</creator><scope>EVB</scope></search><sort><creationdate>20141118</creationdate><title>Integrated nano-farad capacitors and method of formation</title><author>WANG JAMES JEN-HO</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US8890287B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2014</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>WANG JAMES JEN-HO</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>WANG JAMES JEN-HO</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Integrated nano-farad capacitors and method of formation</title><date>2014-11-18</date><risdate>2014</risdate><abstract>A high value capacitance per unit area capacitor is fabricated on a substrate 1 by converting a portion of a primary function anti-reflecting conducting layer 36 to a high value dielectric layer 37 by partially oxidizing the conducting layer to form the dielectric layer. The resultant combination is sandwiched between two metal layer electrodes 35 and 55 to complete the capacitor structure.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US8890287B2
source esp@cenet
subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title Integrated nano-farad capacitors and method of formation
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-08T20%3A19%3A38IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=WANG%20JAMES%20JEN-HO&rft.date=2014-11-18&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS8890287B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true