Calibration for source-synchronous high frequency bus synchronization schemes
Embodiments provide bus synchronization system including a source module, a plurality of destination modules, and a data alignment controller. The source module is configured to synchronize a plurality of data segments of a data bus with a source clock signal, and transmit respective synchronized da...
Gespeichert in:
Hauptverfasser: | , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | |
container_title | |
container_volume | |
creator | WERTHEIMER AVIAD LOSSIN YOAV |
description | Embodiments provide bus synchronization system including a source module, a plurality of destination modules, and a data alignment controller. The source module is configured to synchronize a plurality of data segments of a data bus with a source clock signal, and transmit respective synchronized data segments to individual destination modules. The source module is further configured to transmit the source clock signal to the destination modules contemporaneously with the synchronized data segments. The source module thereafter receives feedback clock signals from the individual destination modules, the feedback clock signals being delayed versions of the source clock signal. The data alignment controller adjusts an output delay time for the individual destination modules, based on the received feedback clock signals, to temporally align output signals of the destination modules. |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US8850258B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US8850258B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US8850258B23</originalsourceid><addsrcrecordid>eNrjZPB1TszJTCpKLMnMz1NIyy9SKM4vLUpO1S2uzEvOKMrPyy8tVsjITM9QSCtKLSxNzUuuVEgCCsGkM6sgOouTM1JzU4t5GFjTEnOKU3mhNDeDgptriLOHbmpBfnxqcUFicmpeakl8aLCFhamBkamFk5ExEUoABoM3PA</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Calibration for source-synchronous high frequency bus synchronization schemes</title><source>esp@cenet</source><creator>WERTHEIMER AVIAD ; LOSSIN YOAV</creator><creatorcontrib>WERTHEIMER AVIAD ; LOSSIN YOAV</creatorcontrib><description>Embodiments provide bus synchronization system including a source module, a plurality of destination modules, and a data alignment controller. The source module is configured to synchronize a plurality of data segments of a data bus with a source clock signal, and transmit respective synchronized data segments to individual destination modules. The source module is further configured to transmit the source clock signal to the destination modules contemporaneously with the synchronized data segments. The source module thereafter receives feedback clock signals from the individual destination modules, the feedback clock signals being delayed versions of the source clock signal. The data alignment controller adjusts an output delay time for the individual destination modules, based on the received feedback clock signals, to temporally align output signals of the destination modules.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2014</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20140930&DB=EPODOC&CC=US&NR=8850258B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20140930&DB=EPODOC&CC=US&NR=8850258B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>WERTHEIMER AVIAD</creatorcontrib><creatorcontrib>LOSSIN YOAV</creatorcontrib><title>Calibration for source-synchronous high frequency bus synchronization schemes</title><description>Embodiments provide bus synchronization system including a source module, a plurality of destination modules, and a data alignment controller. The source module is configured to synchronize a plurality of data segments of a data bus with a source clock signal, and transmit respective synchronized data segments to individual destination modules. The source module is further configured to transmit the source clock signal to the destination modules contemporaneously with the synchronized data segments. The source module thereafter receives feedback clock signals from the individual destination modules, the feedback clock signals being delayed versions of the source clock signal. The data alignment controller adjusts an output delay time for the individual destination modules, based on the received feedback clock signals, to temporally align output signals of the destination modules.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2014</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZPB1TszJTCpKLMnMz1NIyy9SKM4vLUpO1S2uzEvOKMrPyy8tVsjITM9QSCtKLSxNzUuuVEgCCsGkM6sgOouTM1JzU4t5GFjTEnOKU3mhNDeDgptriLOHbmpBfnxqcUFicmpeakl8aLCFhamBkamFk5ExEUoABoM3PA</recordid><startdate>20140930</startdate><enddate>20140930</enddate><creator>WERTHEIMER AVIAD</creator><creator>LOSSIN YOAV</creator><scope>EVB</scope></search><sort><creationdate>20140930</creationdate><title>Calibration for source-synchronous high frequency bus synchronization schemes</title><author>WERTHEIMER AVIAD ; LOSSIN YOAV</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US8850258B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2014</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>WERTHEIMER AVIAD</creatorcontrib><creatorcontrib>LOSSIN YOAV</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>WERTHEIMER AVIAD</au><au>LOSSIN YOAV</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Calibration for source-synchronous high frequency bus synchronization schemes</title><date>2014-09-30</date><risdate>2014</risdate><abstract>Embodiments provide bus synchronization system including a source module, a plurality of destination modules, and a data alignment controller. The source module is configured to synchronize a plurality of data segments of a data bus with a source clock signal, and transmit respective synchronized data segments to individual destination modules. The source module is further configured to transmit the source clock signal to the destination modules contemporaneously with the synchronized data segments. The source module thereafter receives feedback clock signals from the individual destination modules, the feedback clock signals being delayed versions of the source clock signal. The data alignment controller adjusts an output delay time for the individual destination modules, based on the received feedback clock signals, to temporally align output signals of the destination modules.</abstract><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | |
ispartof | |
issn | |
language | eng |
recordid | cdi_epo_espacenet_US8850258B2 |
source | esp@cenet |
subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
title | Calibration for source-synchronous high frequency bus synchronization schemes |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-10T16%3A45%3A48IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=WERTHEIMER%20AVIAD&rft.date=2014-09-30&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS8850258B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |