Stress relief for plastic encapsulated devices

A semiconductor integrated circuit includes a semiconductor substrate, one or more devices in or on the semiconductor substrate, and a dielectric layer above the one or more devices, wherein the dielectric layer has openings over at least portions of the one or more devices. The semiconductor integr...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
1. Verfasser: FRITZ SCOTT N
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator FRITZ SCOTT N
description A semiconductor integrated circuit includes a semiconductor substrate, one or more devices in or on the semiconductor substrate, and a dielectric layer above the one or more devices, wherein the dielectric layer has openings over at least portions of the one or more devices. The semiconductor integrated circuit also includes plastic packaging material (e.g., plastic granules) on a top surface of the dielectric layer and over the openings. In some implementations, the one or more devices include bi-polar transistors, and the openings in the dielectric layer are located over base-emitter junctions of the bi-polar devices.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US8847291B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US8847291B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US8847291B23</originalsourceid><addsrcrecordid>eNrjZNALLilKLS5WKErNyUxNU0jLL1IoyEksLslMVkjNS04sKC7NSSxJTVFISS3LTE4t5mFgTUvMKU7lhdLcDApuriHOHrqpBfnxqcUFicmpeakl8aHBFhYm5kaWhk5GxkQoAQDG2yqj</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Stress relief for plastic encapsulated devices</title><source>esp@cenet</source><creator>FRITZ SCOTT N</creator><creatorcontrib>FRITZ SCOTT N</creatorcontrib><description>A semiconductor integrated circuit includes a semiconductor substrate, one or more devices in or on the semiconductor substrate, and a dielectric layer above the one or more devices, wherein the dielectric layer has openings over at least portions of the one or more devices. The semiconductor integrated circuit also includes plastic packaging material (e.g., plastic granules) on a top surface of the dielectric layer and over the openings. In some implementations, the one or more devices include bi-polar transistors, and the openings in the dielectric layer are located over base-emitter junctions of the bi-polar devices.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2014</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20140930&amp;DB=EPODOC&amp;CC=US&amp;NR=8847291B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20140930&amp;DB=EPODOC&amp;CC=US&amp;NR=8847291B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>FRITZ SCOTT N</creatorcontrib><title>Stress relief for plastic encapsulated devices</title><description>A semiconductor integrated circuit includes a semiconductor substrate, one or more devices in or on the semiconductor substrate, and a dielectric layer above the one or more devices, wherein the dielectric layer has openings over at least portions of the one or more devices. The semiconductor integrated circuit also includes plastic packaging material (e.g., plastic granules) on a top surface of the dielectric layer and over the openings. In some implementations, the one or more devices include bi-polar transistors, and the openings in the dielectric layer are located over base-emitter junctions of the bi-polar devices.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2014</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZNALLilKLS5WKErNyUxNU0jLL1IoyEksLslMVkjNS04sKC7NSSxJTVFISS3LTE4t5mFgTUvMKU7lhdLcDApuriHOHrqpBfnxqcUFicmpeakl8aHBFhYm5kaWhk5GxkQoAQDG2yqj</recordid><startdate>20140930</startdate><enddate>20140930</enddate><creator>FRITZ SCOTT N</creator><scope>EVB</scope></search><sort><creationdate>20140930</creationdate><title>Stress relief for plastic encapsulated devices</title><author>FRITZ SCOTT N</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US8847291B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2014</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>FRITZ SCOTT N</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>FRITZ SCOTT N</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Stress relief for plastic encapsulated devices</title><date>2014-09-30</date><risdate>2014</risdate><abstract>A semiconductor integrated circuit includes a semiconductor substrate, one or more devices in or on the semiconductor substrate, and a dielectric layer above the one or more devices, wherein the dielectric layer has openings over at least portions of the one or more devices. The semiconductor integrated circuit also includes plastic packaging material (e.g., plastic granules) on a top surface of the dielectric layer and over the openings. In some implementations, the one or more devices include bi-polar transistors, and the openings in the dielectric layer are located over base-emitter junctions of the bi-polar devices.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US8847291B2
source esp@cenet
subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title Stress relief for plastic encapsulated devices
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-30T07%3A30%3A54IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=FRITZ%20SCOTT%20N&rft.date=2014-09-30&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS8847291B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true