Method of making a copper interconnect having a barrier liner of multiple metal layers

A method patterns at least one opening in a low-K insulator layer of a multi-level integrated circuit structure, such that a copper conductor is exposed at the bottom of the opening. The method then lines the sidewalls and the bottom of the opening with a first Tantalum Nitride layer in a first cham...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	NOGAMI TAKESHI, SIMON ANDREW H, WYNNE JEAN E, SHAW THOMAS M, YANG CHIHAO
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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