Multiple signal format output driver with configurable internal load

Multiple signal format output driver with configurable internal load

A multiple signal format output driver is configurable to provide a current-mode logic (CML) output signal in response to a CML value of one or more first values of the control signal. The output driver is configurable to provide a low-power, low-voltage positive emitter-coupled logic (low-power LVP...

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Hauptverfasser: SEETHAMRAJU SRISAI RAO, THIRUGNANAM RAJESH
Format: Patent
Sprache:eng
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BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
PULSE TECHNIQUE
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creator SEETHAMRAJU SRISAI RAO
THIRUGNANAM RAJESH
description A multiple signal format output driver is configurable to provide a current-mode logic (CML) output signal in response to a CML value of one or more first values of the control signal. The output driver is configurable to provide a low-power, low-voltage positive emitter-coupled logic (low-power LVPECL) output signal in response to a low-power LVPECL value of the one or more first values of the control signal. The output driver is configurable to provide a low-voltage differential signaling (LVDS) output signal in response to an LVDS value of the one or more first values of the control signal. The output driver may be configurable to provide a LVPECL output signal in response to a second value of the control signal. The output driver may be configurable to provide a high-speed current steering logic (HCSL) output in response to a third value of the control signal.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US8823414B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US8823414B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US8823414B23</originalsourceid><addsrcrecordid>eNrjZHDxLc0pySzISVUozkzPS8xRSMsvyk0sUcgvLSkoLVFIKcosSy1SKM8syVBIzs9Ly0wvLUpMAqrOzCtJLQKpz8lPTOFhYE1LzClO5YXS3AwKbq4hzh66qQX58anFBYnJqXmpJfGhwRYWRsYmhiZORsZEKAEApS8zMw</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Multiple signal format output driver with configurable internal load</title><source>esp@cenet</source><creator>SEETHAMRAJU SRISAI RAO ; THIRUGNANAM RAJESH</creator><creatorcontrib>SEETHAMRAJU SRISAI RAO ; THIRUGNANAM RAJESH</creatorcontrib><description>A multiple signal format output driver is configurable to provide a current-mode logic (CML) output signal in response to a CML value of one or more first values of the control signal. The output driver is configurable to provide a low-power, low-voltage positive emitter-coupled logic (low-power LVPECL) output signal in response to a low-power LVPECL value of the one or more first values of the control signal. The output driver is configurable to provide a low-voltage differential signaling (LVDS) output signal in response to an LVDS value of the one or more first values of the control signal. The output driver may be configurable to provide a LVPECL output signal in response to a second value of the control signal. The output driver may be configurable to provide a high-speed current steering logic (HCSL) output in response to a third value of the control signal.</description><language>eng</language><subject>BASIC ELECTRONIC CIRCUITRY ; ELECTRICITY ; PULSE TECHNIQUE</subject><creationdate>2014</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20140902&amp;DB=EPODOC&amp;CC=US&amp;NR=8823414B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76419</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20140902&amp;DB=EPODOC&amp;CC=US&amp;NR=8823414B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>SEETHAMRAJU SRISAI RAO</creatorcontrib><creatorcontrib>THIRUGNANAM RAJESH</creatorcontrib><title>Multiple signal format output driver with configurable internal load</title><description>A multiple signal format output driver is configurable to provide a current-mode logic (CML) output signal in response to a CML value of one or more first values of the control signal. The output driver is configurable to provide a low-power, low-voltage positive emitter-coupled logic (low-power LVPECL) output signal in response to a low-power LVPECL value of the one or more first values of the control signal. The output driver is configurable to provide a low-voltage differential signaling (LVDS) output signal in response to an LVDS value of the one or more first values of the control signal. The output driver may be configurable to provide a LVPECL output signal in response to a second value of the control signal. The output driver may be configurable to provide a high-speed current steering logic (HCSL) output in response to a third value of the control signal.</description><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>ELECTRICITY</subject><subject>PULSE TECHNIQUE</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2014</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZHDxLc0pySzISVUozkzPS8xRSMsvyk0sUcgvLSkoLVFIKcosSy1SKM8syVBIzs9Ly0wvLUpMAqrOzCtJLQKpz8lPTOFhYE1LzClO5YXS3AwKbq4hzh66qQX58anFBYnJqXmpJfGhwRYWRsYmhiZORsZEKAEApS8zMw</recordid><startdate>20140902</startdate><enddate>20140902</enddate><creator>SEETHAMRAJU SRISAI RAO</creator><creator>THIRUGNANAM RAJESH</creator><scope>EVB</scope></search><sort><creationdate>20140902</creationdate><title>Multiple signal format output driver with configurable internal load</title><author>SEETHAMRAJU SRISAI RAO ; THIRUGNANAM RAJESH</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US8823414B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2014</creationdate><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>ELECTRICITY</topic><topic>PULSE TECHNIQUE</topic><toplevel>online_resources</toplevel><creatorcontrib>SEETHAMRAJU SRISAI RAO</creatorcontrib><creatorcontrib>THIRUGNANAM RAJESH</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>SEETHAMRAJU SRISAI RAO</au><au>THIRUGNANAM RAJESH</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Multiple signal format output driver with configurable internal load</title><date>2014-09-02</date><risdate>2014</risdate><abstract>A multiple signal format output driver is configurable to provide a current-mode logic (CML) output signal in response to a CML value of one or more first values of the control signal. The output driver is configurable to provide a low-power, low-voltage positive emitter-coupled logic (low-power LVPECL) output signal in response to a low-power LVPECL value of the one or more first values of the control signal. The output driver is configurable to provide a low-voltage differential signaling (LVDS) output signal in response to an LVDS value of the one or more first values of the control signal. The output driver may be configurable to provide a LVPECL output signal in response to a second value of the control signal. The output driver may be configurable to provide a high-speed current steering logic (HCSL) output in response to a third value of the control signal.</abstract><oa>free_for_read</oa></addata></record>
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subjects BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
PULSE TECHNIQUE
title Multiple signal format output driver with configurable internal load
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-08T01%3A58%3A05IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=SEETHAMRAJU%20SRISAI%20RAO&rft.date=2014-09-02&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS8823414B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true