Microprocessor having a low-power mode and a non-low power mode, data processing system and computer program product
A microprocessor has a low-power mode and a non-low power mode. The microprocessor includes a processor core for executing instructions provided to the microprocessor and a clock providing a clock signal, which in the non-low power mode has a first frequency and in the low power mode has a second fr...
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creator | MEUNIER GREGORY RANCUREL VIANNEY BUFFERNE VINCENT |
description | A microprocessor has a low-power mode and a non-low power mode. The microprocessor includes a processor core for executing instructions provided to the microprocessor and a clock providing a clock signal, which in the non-low power mode has a first frequency and in the low power mode has a second frequency lower than the first frequency. A hardware timer is present, for scheduling an execution of an event by the microprocessor at a future point in time. The hardware timer is connected to the clock for determining a period of time between a current point in time and a point in time the event based on a number of clock cycles of the clock signal. A timer controller can determine, when the data processing system switches from the low power mode to the non-low power mode, a number of clock cycles of a clock signal with the first frequency that corresponds to a low-power mode period during which the microprocessor has been in the low power mode and adjusting the hardware timer based on the determined number. |
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The microprocessor includes a processor core for executing instructions provided to the microprocessor and a clock providing a clock signal, which in the non-low power mode has a first frequency and in the low power mode has a second frequency lower than the first frequency. A hardware timer is present, for scheduling an execution of an event by the microprocessor at a future point in time. The hardware timer is connected to the clock for determining a period of time between a current point in time and a point in time the event based on a number of clock cycles of the clock signal. A timer controller can determine, when the data processing system switches from the low power mode to the non-low power mode, a number of clock cycles of a clock signal with the first frequency that corresponds to a low-power mode period during which the microprocessor has been in the low power mode and adjusting the hardware timer based on the determined number.</description><language>eng</language><subject>CALCULATING ; CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION ANDCOMMUNICATION TECHNOLOGIES [ICT], I.E. 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The microprocessor includes a processor core for executing instructions provided to the microprocessor and a clock providing a clock signal, which in the non-low power mode has a first frequency and in the low power mode has a second frequency lower than the first frequency. A hardware timer is present, for scheduling an execution of an event by the microprocessor at a future point in time. The hardware timer is connected to the clock for determining a period of time between a current point in time and a point in time the event based on a number of clock cycles of the clock signal. A timer controller can determine, when the data processing system switches from the low power mode to the non-low power mode, a number of clock cycles of a clock signal with the first frequency that corresponds to a low-power mode period during which the microprocessor has been in the low power mode and adjusting the hardware timer based on the determined number.</description><subject>CALCULATING</subject><subject>CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION ANDCOMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION ANDCOMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THIR OWNENERGY USE</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC COMMUNICATION TECHNIQUE</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>ELECTRICITY</subject><subject>GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC</subject><subject>GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS</subject><subject>PHYSICS</subject><subject>TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS</subject><subject>TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINSTCLIMATE CHANGE</subject><subject>TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2014</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNjDEOwjAQBN1QIOAP9wDcQAjUIBANFVBHJ_sIkWKf5XOI-D0OikRLtdLO7E5VujQmcohsSIQjPPHV-BoQWu514J4iOLYE6G0uPXudAfzAEiwmhPFgmMpbErnvwLALXcpmxnVEN6TtTJqryQNbocWYMwWn4-1w1hS4IgloyFOq7tfddlMWRblfrf9QPvtERLk</recordid><startdate>20140617</startdate><enddate>20140617</enddate><creator>MEUNIER GREGORY</creator><creator>RANCUREL VIANNEY</creator><creator>BUFFERNE VINCENT</creator><scope>EVB</scope></search><sort><creationdate>20140617</creationdate><title>Microprocessor having a low-power mode and a non-low power mode, data processing system and computer program product</title><author>MEUNIER GREGORY ; RANCUREL VIANNEY ; BUFFERNE VINCENT</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US8756446B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2014</creationdate><topic>CALCULATING</topic><topic>CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION ANDCOMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION ANDCOMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THIR OWNENERGY USE</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC COMMUNICATION TECHNIQUE</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>ELECTRICITY</topic><topic>GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC</topic><topic>GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS</topic><topic>PHYSICS</topic><topic>TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS</topic><topic>TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINSTCLIMATE CHANGE</topic><topic>TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</topic><toplevel>online_resources</toplevel><creatorcontrib>MEUNIER GREGORY</creatorcontrib><creatorcontrib>RANCUREL VIANNEY</creatorcontrib><creatorcontrib>BUFFERNE VINCENT</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>MEUNIER GREGORY</au><au>RANCUREL VIANNEY</au><au>BUFFERNE VINCENT</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Microprocessor having a low-power mode and a non-low power mode, data processing system and computer program product</title><date>2014-06-17</date><risdate>2014</risdate><abstract>A microprocessor has a low-power mode and a non-low power mode. The microprocessor includes a processor core for executing instructions provided to the microprocessor and a clock providing a clock signal, which in the non-low power mode has a first frequency and in the low power mode has a second frequency lower than the first frequency. A hardware timer is present, for scheduling an execution of an event by the microprocessor at a future point in time. The hardware timer is connected to the clock for determining a period of time between a current point in time and a point in time the event based on a number of clock cycles of the clock signal. A timer controller can determine, when the data processing system switches from the low power mode to the non-low power mode, a number of clock cycles of a clock signal with the first frequency that corresponds to a low-power mode period during which the microprocessor has been in the low power mode and adjusting the hardware timer based on the determined number.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | CALCULATING CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION ANDCOMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION ANDCOMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THIR OWNENERGY USE COMPUTING COUNTING ELECTRIC COMMUNICATION TECHNIQUE ELECTRIC DIGITAL DATA PROCESSING ELECTRICITY GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS PHYSICS TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINSTCLIMATE CHANGE TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION |
title | Microprocessor having a low-power mode and a non-low power mode, data processing system and computer program product |
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