Bitline voltage regulation in non-volatile memory

Systems and methods are provided to minimize write disturb conditions in an untargeted memory cell of a non-volatile memory array. Bitline driver circuits are provided to control a ramped voltage applied both to a bitline of a target memory cell and a neighboring bitline of an untargeted memory cell...

Ausführliche Beschreibung

Bibliographische Detailangaben

1. Verfasser:	BINBOGA EVRIM
Format:	Patent
Sprache:	eng
Schlagworte:	ELECTRICITY INFORMATION STORAGE PHYSICS STATIC STORES
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!