Nonvolatile semiconductor memory device
A semiconductor memory device which includes multi-bit memory cells that store multi-bit data and memory cells that store data of fewer bits then that of the multi-bit data. Thus, the semiconductor memory device includes a plurality of memory cells which store n-bit (where n is a natural number that...
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creator | SHIBATA NOBORU KANEBAKO KAZUNORI |
description | A semiconductor memory device which includes multi-bit memory cells that store multi-bit data and memory cells that store data of fewer bits then that of the multi-bit data. Thus, the semiconductor memory device includes a plurality of memory cells which store n-bit (where n is a natural number that is equal to or larger than 2) data for one cell. Among the plurality of memory cells, h-bit (h n) data is stored in a memory MLC of a first region MLB, and i-bit (i |
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fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US8687420B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US8687420B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US8687420B23</originalsourceid><addsrcrecordid>eNrjZFD3y88ry89JLMnMSVUoTs3NTM7PSylNLskvUshNzc0vqlRISS3LTE7lYWBNS8wpTuWF0twMCm6uIc4euqkF-fGpxQWJyal5qSXxocEWZhbmJkYGTkbGRCgBAJwxKFk</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Nonvolatile semiconductor memory device</title><source>esp@cenet</source><creator>SHIBATA NOBORU ; KANEBAKO KAZUNORI</creator><creatorcontrib>SHIBATA NOBORU ; KANEBAKO KAZUNORI</creatorcontrib><description>A semiconductor memory device which includes multi-bit memory cells that store multi-bit data and memory cells that store data of fewer bits then that of the multi-bit data. Thus, the semiconductor memory device includes a plurality of memory cells which store n-bit (where n is a natural number that is equal to or larger than 2) data for one cell. Among the plurality of memory cells, h-bit (h n) data is stored in a memory MLC of a first region MLB, and i-bit (i<h) data is stored in a memory SLC of a second region SLB. If the number of rewritings in the memory cells of the second region SLB reaches a prescribed value, the i-bit data is stored in the memory of the first region MLB rather than the memory cells of the second region SLB.</description><language>eng</language><subject>INFORMATION STORAGE ; PHYSICS ; STATIC STORES</subject><creationdate>2014</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20140401&DB=EPODOC&CC=US&NR=8687420B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20140401&DB=EPODOC&CC=US&NR=8687420B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>SHIBATA NOBORU</creatorcontrib><creatorcontrib>KANEBAKO KAZUNORI</creatorcontrib><title>Nonvolatile semiconductor memory device</title><description>A semiconductor memory device which includes multi-bit memory cells that store multi-bit data and memory cells that store data of fewer bits then that of the multi-bit data. Thus, the semiconductor memory device includes a plurality of memory cells which store n-bit (where n is a natural number that is equal to or larger than 2) data for one cell. Among the plurality of memory cells, h-bit (h n) data is stored in a memory MLC of a first region MLB, and i-bit (i<h) data is stored in a memory SLC of a second region SLB. If the number of rewritings in the memory cells of the second region SLB reaches a prescribed value, the i-bit data is stored in the memory of the first region MLB rather than the memory cells of the second region SLB.</description><subject>INFORMATION STORAGE</subject><subject>PHYSICS</subject><subject>STATIC STORES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2014</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZFD3y88ry89JLMnMSVUoTs3NTM7PSylNLskvUshNzc0vqlRISS3LTE7lYWBNS8wpTuWF0twMCm6uIc4euqkF-fGpxQWJyal5qSXxocEWZhbmJkYGTkbGRCgBAJwxKFk</recordid><startdate>20140401</startdate><enddate>20140401</enddate><creator>SHIBATA NOBORU</creator><creator>KANEBAKO KAZUNORI</creator><scope>EVB</scope></search><sort><creationdate>20140401</creationdate><title>Nonvolatile semiconductor memory device</title><author>SHIBATA NOBORU ; KANEBAKO KAZUNORI</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US8687420B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2014</creationdate><topic>INFORMATION STORAGE</topic><topic>PHYSICS</topic><topic>STATIC STORES</topic><toplevel>online_resources</toplevel><creatorcontrib>SHIBATA NOBORU</creatorcontrib><creatorcontrib>KANEBAKO KAZUNORI</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>SHIBATA NOBORU</au><au>KANEBAKO KAZUNORI</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Nonvolatile semiconductor memory device</title><date>2014-04-01</date><risdate>2014</risdate><abstract>A semiconductor memory device which includes multi-bit memory cells that store multi-bit data and memory cells that store data of fewer bits then that of the multi-bit data. Thus, the semiconductor memory device includes a plurality of memory cells which store n-bit (where n is a natural number that is equal to or larger than 2) data for one cell. Among the plurality of memory cells, h-bit (h n) data is stored in a memory MLC of a first region MLB, and i-bit (i<h) data is stored in a memory SLC of a second region SLB. If the number of rewritings in the memory cells of the second region SLB reaches a prescribed value, the i-bit data is stored in the memory of the first region MLB rather than the memory cells of the second region SLB.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | INFORMATION STORAGE PHYSICS STATIC STORES |
title | Nonvolatile semiconductor memory device |
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