Inductive and capacitive elements for semiconductor technologies with minimum pattern density requirements

The present invention provides a semiconductor device comprising a plurality of layers, the semiconductor device comprising:-a substrate having a first major surface,-an inductive element fabricated on the first major surface of the substrate, the inductive element comprising at least one conductive line, and-a plurality of tilling structures in at least one layer, wherein the plurality of tilling structures are electrically connected together and are arranged in a geometrical pattern so as to substantially inhibit an inducement of an image current in the tilling structures by a current in the inductive element. It is an advantage of the above semiconductor device that, by using such tilling structures, an inductive element with improved quality factor is obtained. The present invention also provides a method for providing an inductive element in a semiconductor device comprising a plurality of layers.