Pseudo multi-master I2C operation in a blade server chassis
A system and method are directed towards a pseudo multi-master operation on a serial bus. The pseudo multi-master operation allows multiple devices without standard multi-master functionality to operate on the serial bus as masters. In a disclosed example, the serial bus is an Inter-Integrated Circu...
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creator | AUSTEN CHRISTOPHER H BOLAN JOSEPH E WOOD CHRISTOPHER L JACOBS BRENT W BOECKER DOUGLAS M CAPORALE PATRICK L ROSEDAHL TODD J |
description | A system and method are directed towards a pseudo multi-master operation on a serial bus. The pseudo multi-master operation allows multiple devices without standard multi-master functionality to operate on the serial bus as masters. In a disclosed example, the serial bus is an Inter-Integrated Circuit (I2C) bus, which is isolated when an adapter card requires access to the I2C bus, such as to update vital product data (VPD) to a memory device, and to cache the updated VPD to a chassis management module. |
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fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US8626973B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US8626973B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US8626973B23</originalsourceid><addsrcrecordid>eNrjZLAOKE4tTclXyC3NKcnUzU0sLkktUvA0clbIL0gtSizJzM9TyMxTSFRIyklMSVUoTi0qA8onZyQWF2cW8zCwpiXmFKfyQmluBgU31xBnD93Ugvz41OKCxOTUvNSS-NBgCzMjM0tzYycjYyKUAAAKsC6e</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Pseudo multi-master I2C operation in a blade server chassis</title><source>esp@cenet</source><creator>AUSTEN CHRISTOPHER H ; BOLAN JOSEPH E ; WOOD CHRISTOPHER L ; JACOBS BRENT W ; BOECKER DOUGLAS M ; CAPORALE PATRICK L ; ROSEDAHL TODD J</creator><creatorcontrib>AUSTEN CHRISTOPHER H ; BOLAN JOSEPH E ; WOOD CHRISTOPHER L ; JACOBS BRENT W ; BOECKER DOUGLAS M ; CAPORALE PATRICK L ; ROSEDAHL TODD J</creatorcontrib><description>A system and method are directed towards a pseudo multi-master operation on a serial bus. The pseudo multi-master operation allows multiple devices without standard multi-master functionality to operate on the serial bus as masters. In a disclosed example, the serial bus is an Inter-Integrated Circuit (I2C) bus, which is isolated when an adapter card requires access to the I2C bus, such as to update vital product data (VPD) to a memory device, and to cache the updated VPD to a chassis management module.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2014</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20140107&DB=EPODOC&CC=US&NR=8626973B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20140107&DB=EPODOC&CC=US&NR=8626973B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>AUSTEN CHRISTOPHER H</creatorcontrib><creatorcontrib>BOLAN JOSEPH E</creatorcontrib><creatorcontrib>WOOD CHRISTOPHER L</creatorcontrib><creatorcontrib>JACOBS BRENT W</creatorcontrib><creatorcontrib>BOECKER DOUGLAS M</creatorcontrib><creatorcontrib>CAPORALE PATRICK L</creatorcontrib><creatorcontrib>ROSEDAHL TODD J</creatorcontrib><title>Pseudo multi-master I2C operation in a blade server chassis</title><description>A system and method are directed towards a pseudo multi-master operation on a serial bus. The pseudo multi-master operation allows multiple devices without standard multi-master functionality to operate on the serial bus as masters. In a disclosed example, the serial bus is an Inter-Integrated Circuit (I2C) bus, which is isolated when an adapter card requires access to the I2C bus, such as to update vital product data (VPD) to a memory device, and to cache the updated VPD to a chassis management module.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2014</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLAOKE4tTclXyC3NKcnUzU0sLkktUvA0clbIL0gtSizJzM9TyMxTSFRIyklMSVUoTi0qA8onZyQWF2cW8zCwpiXmFKfyQmluBgU31xBnD93Ugvz41OKCxOTUvNSS-NBgCzMjM0tzYycjYyKUAAAKsC6e</recordid><startdate>20140107</startdate><enddate>20140107</enddate><creator>AUSTEN CHRISTOPHER H</creator><creator>BOLAN JOSEPH E</creator><creator>WOOD CHRISTOPHER L</creator><creator>JACOBS BRENT W</creator><creator>BOECKER DOUGLAS M</creator><creator>CAPORALE PATRICK L</creator><creator>ROSEDAHL TODD J</creator><scope>EVB</scope></search><sort><creationdate>20140107</creationdate><title>Pseudo multi-master I2C operation in a blade server chassis</title><author>AUSTEN CHRISTOPHER H ; BOLAN JOSEPH E ; WOOD CHRISTOPHER L ; JACOBS BRENT W ; BOECKER DOUGLAS M ; CAPORALE PATRICK L ; ROSEDAHL TODD J</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US8626973B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2014</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>AUSTEN CHRISTOPHER H</creatorcontrib><creatorcontrib>BOLAN JOSEPH E</creatorcontrib><creatorcontrib>WOOD CHRISTOPHER L</creatorcontrib><creatorcontrib>JACOBS BRENT W</creatorcontrib><creatorcontrib>BOECKER DOUGLAS M</creatorcontrib><creatorcontrib>CAPORALE PATRICK L</creatorcontrib><creatorcontrib>ROSEDAHL TODD J</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>AUSTEN CHRISTOPHER H</au><au>BOLAN JOSEPH E</au><au>WOOD CHRISTOPHER L</au><au>JACOBS BRENT W</au><au>BOECKER DOUGLAS M</au><au>CAPORALE PATRICK L</au><au>ROSEDAHL TODD J</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Pseudo multi-master I2C operation in a blade server chassis</title><date>2014-01-07</date><risdate>2014</risdate><abstract>A system and method are directed towards a pseudo multi-master operation on a serial bus. The pseudo multi-master operation allows multiple devices without standard multi-master functionality to operate on the serial bus as masters. In a disclosed example, the serial bus is an Inter-Integrated Circuit (I2C) bus, which is isolated when an adapter card requires access to the I2C bus, such as to update vital product data (VPD) to a memory device, and to cache the updated VPD to a chassis management module.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
title | Pseudo multi-master I2C operation in a blade server chassis |
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