Apparatus and method thereof for clock and data recovery of N-PAM encoded signals using a conventional 2-PAM CDR circuit

An interface circuit for enabling clock and data recovery (CDR) of N-level pulse amplitude modulation (N-PAM) modulated data streams using a 2-PAM CDR circuit. The circuit comprises a number of N-1 comparators for comparing an input data stream to N-1 configurable thresholds, the input data stream i...

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Hauptverfasser: SLEZAK YARON, VEYTSMAN GENADY
Format: Patent
Sprache:eng
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