Computer system including an interrupt controller

A computer system which shortens standby time of CPUs and improves CPU processing efficiency of a performance mode upon switching from the performance mode (parallel operation) to a safety mode (master/checker operation) is provided. In a computer system including: at least two CPUs; a programmable...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	YAMADA HIROMICHI, SHIMAMURA KOTARO, ISHIGURO YUICHI, KANEKAWA NOBUYASU
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
Online-Zugang:	Volltext bestellen
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