Semiconductor device with transistor local interconnects
A semiconductor device is provided for implementing at least one logic element. The semiconductor device includes a semiconductor substrate with a first transistor and a second transistor formed on the semiconductor substrate. Each of the transistors includes a source, a drain, and a gate. A CA laye...
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creator | DENG YUNFEI LIN IRENE Y RASHED MAHBUB GULLETTE JAMES BENJAMIN JOHNSON SCOTT TARABBIA MARC RHEE SEUNG-HYUN NGUYEN CHINH SOSS STEVEN VENKATESAN SURESH MA YUANSHENG KYE JONGWOOK KIM JEFF KENGERI SUBRAMANI AUGUR ROD |
description | A semiconductor device is provided for implementing at least one logic element. The semiconductor device includes a semiconductor substrate with a first transistor and a second transistor formed on the semiconductor substrate. Each of the transistors includes a source, a drain, and a gate. A CA layer is electrically connected to at least one of the source or the drain of the first transistor. A CB layer is electrically connected to at least one of the gates of the transistors and the CA layer. |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US8581348B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US8581348B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US8581348B23</originalsourceid><addsrcrecordid>eNrjZLAITs3NTM7PSylNLskvUkhJLctMTlUozyzJUCgpSswrziwGCefkJyfmKGTmlaQWAdXmpSaXFPMwsKYl5hSn8kJpbgYFN9cQZw_d1IL8-NTigsTk1LzUkvjQYAtTC0NjEwsnI2MilAAAGjkvCQ</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Semiconductor device with transistor local interconnects</title><source>esp@cenet</source><creator>DENG YUNFEI ; LIN IRENE Y ; RASHED MAHBUB ; GULLETTE JAMES BENJAMIN ; JOHNSON SCOTT ; TARABBIA MARC ; RHEE SEUNG-HYUN ; NGUYEN CHINH ; SOSS STEVEN ; VENKATESAN SURESH ; MA YUANSHENG ; KYE JONGWOOK ; KIM JEFF ; KENGERI SUBRAMANI ; AUGUR ROD</creator><creatorcontrib>DENG YUNFEI ; LIN IRENE Y ; RASHED MAHBUB ; GULLETTE JAMES BENJAMIN ; JOHNSON SCOTT ; TARABBIA MARC ; RHEE SEUNG-HYUN ; NGUYEN CHINH ; SOSS STEVEN ; VENKATESAN SURESH ; MA YUANSHENG ; KYE JONGWOOK ; KIM JEFF ; KENGERI SUBRAMANI ; AUGUR ROD</creatorcontrib><description>A semiconductor device is provided for implementing at least one logic element. The semiconductor device includes a semiconductor substrate with a first transistor and a second transistor formed on the semiconductor substrate. Each of the transistors includes a source, a drain, and a gate. A CA layer is electrically connected to at least one of the source or the drain of the first transistor. A CB layer is electrically connected to at least one of the gates of the transistors and the CA layer.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2013</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20131112&DB=EPODOC&CC=US&NR=8581348B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20131112&DB=EPODOC&CC=US&NR=8581348B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>DENG YUNFEI</creatorcontrib><creatorcontrib>LIN IRENE Y</creatorcontrib><creatorcontrib>RASHED MAHBUB</creatorcontrib><creatorcontrib>GULLETTE JAMES BENJAMIN</creatorcontrib><creatorcontrib>JOHNSON SCOTT</creatorcontrib><creatorcontrib>TARABBIA MARC</creatorcontrib><creatorcontrib>RHEE SEUNG-HYUN</creatorcontrib><creatorcontrib>NGUYEN CHINH</creatorcontrib><creatorcontrib>SOSS STEVEN</creatorcontrib><creatorcontrib>VENKATESAN SURESH</creatorcontrib><creatorcontrib>MA YUANSHENG</creatorcontrib><creatorcontrib>KYE JONGWOOK</creatorcontrib><creatorcontrib>KIM JEFF</creatorcontrib><creatorcontrib>KENGERI SUBRAMANI</creatorcontrib><creatorcontrib>AUGUR ROD</creatorcontrib><title>Semiconductor device with transistor local interconnects</title><description>A semiconductor device is provided for implementing at least one logic element. The semiconductor device includes a semiconductor substrate with a first transistor and a second transistor formed on the semiconductor substrate. Each of the transistors includes a source, a drain, and a gate. A CA layer is electrically connected to at least one of the source or the drain of the first transistor. A CB layer is electrically connected to at least one of the gates of the transistors and the CA layer.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2013</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLAITs3NTM7PSylNLskvUkhJLctMTlUozyzJUCgpSswrziwGCefkJyfmKGTmlaQWAdXmpSaXFPMwsKYl5hSn8kJpbgYFN9cQZw_d1IL8-NTigsTk1LzUkvjQYAtTC0NjEwsnI2MilAAAGjkvCQ</recordid><startdate>20131112</startdate><enddate>20131112</enddate><creator>DENG YUNFEI</creator><creator>LIN IRENE Y</creator><creator>RASHED MAHBUB</creator><creator>GULLETTE JAMES BENJAMIN</creator><creator>JOHNSON SCOTT</creator><creator>TARABBIA MARC</creator><creator>RHEE SEUNG-HYUN</creator><creator>NGUYEN CHINH</creator><creator>SOSS STEVEN</creator><creator>VENKATESAN SURESH</creator><creator>MA YUANSHENG</creator><creator>KYE JONGWOOK</creator><creator>KIM JEFF</creator><creator>KENGERI SUBRAMANI</creator><creator>AUGUR ROD</creator><scope>EVB</scope></search><sort><creationdate>20131112</creationdate><title>Semiconductor device with transistor local interconnects</title><author>DENG YUNFEI ; LIN IRENE Y ; RASHED MAHBUB ; GULLETTE JAMES BENJAMIN ; JOHNSON SCOTT ; TARABBIA MARC ; RHEE SEUNG-HYUN ; NGUYEN CHINH ; SOSS STEVEN ; VENKATESAN SURESH ; MA YUANSHENG ; KYE JONGWOOK ; KIM JEFF ; KENGERI SUBRAMANI ; AUGUR ROD</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US8581348B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2013</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>DENG YUNFEI</creatorcontrib><creatorcontrib>LIN IRENE Y</creatorcontrib><creatorcontrib>RASHED MAHBUB</creatorcontrib><creatorcontrib>GULLETTE JAMES BENJAMIN</creatorcontrib><creatorcontrib>JOHNSON SCOTT</creatorcontrib><creatorcontrib>TARABBIA MARC</creatorcontrib><creatorcontrib>RHEE SEUNG-HYUN</creatorcontrib><creatorcontrib>NGUYEN CHINH</creatorcontrib><creatorcontrib>SOSS STEVEN</creatorcontrib><creatorcontrib>VENKATESAN SURESH</creatorcontrib><creatorcontrib>MA YUANSHENG</creatorcontrib><creatorcontrib>KYE JONGWOOK</creatorcontrib><creatorcontrib>KIM JEFF</creatorcontrib><creatorcontrib>KENGERI SUBRAMANI</creatorcontrib><creatorcontrib>AUGUR ROD</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>DENG YUNFEI</au><au>LIN IRENE Y</au><au>RASHED MAHBUB</au><au>GULLETTE JAMES BENJAMIN</au><au>JOHNSON SCOTT</au><au>TARABBIA MARC</au><au>RHEE SEUNG-HYUN</au><au>NGUYEN CHINH</au><au>SOSS STEVEN</au><au>VENKATESAN SURESH</au><au>MA YUANSHENG</au><au>KYE JONGWOOK</au><au>KIM JEFF</au><au>KENGERI SUBRAMANI</au><au>AUGUR ROD</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Semiconductor device with transistor local interconnects</title><date>2013-11-12</date><risdate>2013</risdate><abstract>A semiconductor device is provided for implementing at least one logic element. The semiconductor device includes a semiconductor substrate with a first transistor and a second transistor formed on the semiconductor substrate. Each of the transistors includes a source, a drain, and a gate. A CA layer is electrically connected to at least one of the source or the drain of the first transistor. A CB layer is electrically connected to at least one of the gates of the transistors and the CA layer.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | Semiconductor device with transistor local interconnects |
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