Checkpointing long latency instruction as fake branch in branch prediction mechanism

A data processing apparatus and method of data processing are provided. The data processing apparatus comprises execution circuitry configured to execute a sequence of program instructions. Checkpoint circuitry is configured to identify an instance of a predetermined type of instruction in the seque...

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Bibliographische Detailangaben
Hauptverfasser: CHAUSSADE NICOLAS, TEYSSIER REMI, TEYSSIER MELANIE EMANUELLE LUCIE, JAUBERT JOCELYN FRANCOIS ORION, BEGON FLORENT
Format: Patent
Sprache:eng
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