Charge pump circuit using low voltage transistors

Charge pump circuit using low voltage transistors

The charge pump circuit has a plurality of cascaded charge pump stages, each provided with a first pump capacitor connected to a first internal node and receiving a first high voltage phase signal, and a second pump capacitor connected to a second internal node and receiving a second high voltage ph...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: UCCIARDELLO CARMELO, CONTE ANTONINO, PAGANO SANTI NUNZIO ANTONINO
Format: Patent
Sprache:eng
Schlagworte:
INFORMATION STORAGE
PHYSICS
STATIC STORES
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator UCCIARDELLO CARMELO
CONTE ANTONINO
PAGANO SANTI NUNZIO ANTONINO
description The charge pump circuit has a plurality of cascaded charge pump stages, each provided with a first pump capacitor connected to a first internal node and receiving a first high voltage phase signal, and a second pump capacitor connected to a second internal node and receiving a second high voltage phase signal, complementary with respect to the first. A first transfer transistor is coupled between the first internal node and an intermediate node, and a second transfer transistor is coupled between the second internal node and the intermediate node. The first and second high voltage phase signals have a voltage dynamics higher than a maximum voltage sustainable by the first and second transfer transistors. A protection stage is set between the first internal node and second internal node and respectively, the first transfer transistor and second transfer transistor, for protecting the same transfer transistors from overvoltages.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US8570813B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US8570813B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US8570813B23</originalsourceid><addsrcrecordid>eNrjZDB0zkgsSk9VKCjNLVBIzixKLs0sUSgtzsxLV8jJL1coy88pSQRKlxQl5hVnFpfkFxXzMLCmJeYUp_JCaW4GBTfXEGcP3dSC_PjU4oLE5NS81JL40GALU3MDC0NjJyNjIpQAAGbaK98</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Charge pump circuit using low voltage transistors</title><source>esp@cenet</source><creator>UCCIARDELLO CARMELO ; CONTE ANTONINO ; PAGANO SANTI NUNZIO ANTONINO</creator><creatorcontrib>UCCIARDELLO CARMELO ; CONTE ANTONINO ; PAGANO SANTI NUNZIO ANTONINO</creatorcontrib><description>The charge pump circuit has a plurality of cascaded charge pump stages, each provided with a first pump capacitor connected to a first internal node and receiving a first high voltage phase signal, and a second pump capacitor connected to a second internal node and receiving a second high voltage phase signal, complementary with respect to the first. A first transfer transistor is coupled between the first internal node and an intermediate node, and a second transfer transistor is coupled between the second internal node and the intermediate node. The first and second high voltage phase signals have a voltage dynamics higher than a maximum voltage sustainable by the first and second transfer transistors. A protection stage is set between the first internal node and second internal node and respectively, the first transfer transistor and second transfer transistor, for protecting the same transfer transistors from overvoltages.</description><language>eng</language><subject>INFORMATION STORAGE ; PHYSICS ; STATIC STORES</subject><creationdate>2013</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20131029&amp;DB=EPODOC&amp;CC=US&amp;NR=8570813B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20131029&amp;DB=EPODOC&amp;CC=US&amp;NR=8570813B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>UCCIARDELLO CARMELO</creatorcontrib><creatorcontrib>CONTE ANTONINO</creatorcontrib><creatorcontrib>PAGANO SANTI NUNZIO ANTONINO</creatorcontrib><title>Charge pump circuit using low voltage transistors</title><description>The charge pump circuit has a plurality of cascaded charge pump stages, each provided with a first pump capacitor connected to a first internal node and receiving a first high voltage phase signal, and a second pump capacitor connected to a second internal node and receiving a second high voltage phase signal, complementary with respect to the first. A first transfer transistor is coupled between the first internal node and an intermediate node, and a second transfer transistor is coupled between the second internal node and the intermediate node. The first and second high voltage phase signals have a voltage dynamics higher than a maximum voltage sustainable by the first and second transfer transistors. A protection stage is set between the first internal node and second internal node and respectively, the first transfer transistor and second transfer transistor, for protecting the same transfer transistors from overvoltages.</description><subject>INFORMATION STORAGE</subject><subject>PHYSICS</subject><subject>STATIC STORES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2013</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDB0zkgsSk9VKCjNLVBIzixKLs0sUSgtzsxLV8jJL1coy88pSQRKlxQl5hVnFpfkFxXzMLCmJeYUp_JCaW4GBTfXEGcP3dSC_PjU4oLE5NS81JL40GALU3MDC0NjJyNjIpQAAGbaK98</recordid><startdate>20131029</startdate><enddate>20131029</enddate><creator>UCCIARDELLO CARMELO</creator><creator>CONTE ANTONINO</creator><creator>PAGANO SANTI NUNZIO ANTONINO</creator><scope>EVB</scope></search><sort><creationdate>20131029</creationdate><title>Charge pump circuit using low voltage transistors</title><author>UCCIARDELLO CARMELO ; CONTE ANTONINO ; PAGANO SANTI NUNZIO ANTONINO</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US8570813B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2013</creationdate><topic>INFORMATION STORAGE</topic><topic>PHYSICS</topic><topic>STATIC STORES</topic><toplevel>online_resources</toplevel><creatorcontrib>UCCIARDELLO CARMELO</creatorcontrib><creatorcontrib>CONTE ANTONINO</creatorcontrib><creatorcontrib>PAGANO SANTI NUNZIO ANTONINO</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>UCCIARDELLO CARMELO</au><au>CONTE ANTONINO</au><au>PAGANO SANTI NUNZIO ANTONINO</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Charge pump circuit using low voltage transistors</title><date>2013-10-29</date><risdate>2013</risdate><abstract>The charge pump circuit has a plurality of cascaded charge pump stages, each provided with a first pump capacitor connected to a first internal node and receiving a first high voltage phase signal, and a second pump capacitor connected to a second internal node and receiving a second high voltage phase signal, complementary with respect to the first. A first transfer transistor is coupled between the first internal node and an intermediate node, and a second transfer transistor is coupled between the second internal node and the intermediate node. The first and second high voltage phase signals have a voltage dynamics higher than a maximum voltage sustainable by the first and second transfer transistors. A protection stage is set between the first internal node and second internal node and respectively, the first transfer transistor and second transfer transistor, for protecting the same transfer transistors from overvoltages.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US8570813B2
source esp@cenet
subjects INFORMATION STORAGE
PHYSICS
STATIC STORES
title Charge pump circuit using low voltage transistors
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-03T14%3A16%3A09IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=UCCIARDELLO%20CARMELO&rft.date=2013-10-29&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS8570813B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true