Output buffer

According to one embodiment, a clamp transistor is inserted in series between a P-channel field effect transistor and an N-channel field effect transistor and an intermediate level between a high potential supplied to a source of the P-channel field effect transistor and a low potential supplied to...

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Bibliographische Detailangaben
1. Verfasser:	SHIMIZU YUUI
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRONIC CIRCUITRY ELECTRICITY GENERATION OF NOISE BY SUCH CIRCUITS GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING,BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN ANON-SWITCHING MANNER PULSE TECHNIQUE
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Beschreibung
Zusammenfassung:	According to one embodiment, a clamp transistor is inserted in series between a P-channel field effect transistor and an N-channel field effect transistor and an intermediate level between a high potential supplied to a source of the P-channel field effect transistor and a low potential supplied to a source of the N-channel field effect transistor is input into a gate of the clamp transistor to clamp a drain potential of the N-channel field effect transistor.