Transaction performance monitoring in a processor bus bridge

Described embodiments provide a system having a bridge for connecting two different processor buses. A process monitor within the bridge allows for measuring latency of commands issued on a first bus, passing through the bridge, and executed by clients coupled to the second bus. By using identificat...

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Bibliographische Detailangaben

Hauptverfasser:	BYRNE RICHARD J, POLLOCK STEVEN J, BETKER MICHAEL R, MASTERS DAVID S
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
Online-Zugang:	Volltext bestellen
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