Enhancing metal/low-K interconnect reliability using a protection layer
A protection layer is coated or otherwise formed over the interconnect structure. The interconnect structure includes a metal line (such as top and bottom metal layers connected by a metal via) and a low-K material. The protection layer includes a vertically aligned dielectric or other material disp...
Gespeichert in:
Hauptverfasser: | , , , , , , , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | |
container_title | |
container_volume | |
creator | TEE TONG YAN LOO ZHI YUAN SHANE WANG SHANZHONG ZHANG XUEREN NOSIK VALERIY IDAPALAPATI SRIDHAR MHAISALKAR SUBODH ZHOU JIJIE |
description | A protection layer is coated or otherwise formed over the interconnect structure. The interconnect structure includes a metal line (such as top and bottom metal layers connected by a metal via) and a low-K material. The protection layer includes a vertically aligned dielectric or other material dispersed with carbon nanotubes. The protection layer could include one or multiple layers of carbon nanotubes, and the carbon nanotubes could have any suitable dispersion, alignment, and pattern in each layer of the protection layer. Among other things, the carbon nanotubes help to reduce or prevent damage to the interconnect structure, such as by reducing or preventing the collapse of the low-K material or delamination between the metal line and the low-K material. |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US8486824B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US8486824B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US8486824B23</originalsourceid><addsrcrecordid>eNrjZHB3zctIzEvOzEtXyE0tSczRz8kv1_VWyMwrSS1Kzs_LS00uUShKzclMTMrMySypVCgtBilNVCgoyi8BymXm5ynkJFamFvEwsKYl5hSn8kJpbgYFN9cQZw_d1IL8-NTigsTk1LzUkvjQYAsTCzMLIxMnI2MilAAAJ9E0GA</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Enhancing metal/low-K interconnect reliability using a protection layer</title><source>esp@cenet</source><creator>TEE TONG YAN ; LOO ZHI YUAN SHANE ; WANG SHANZHONG ; ZHANG XUEREN ; NOSIK VALERIY ; IDAPALAPATI SRIDHAR ; MHAISALKAR SUBODH ; ZHOU JIJIE</creator><creatorcontrib>TEE TONG YAN ; LOO ZHI YUAN SHANE ; WANG SHANZHONG ; ZHANG XUEREN ; NOSIK VALERIY ; IDAPALAPATI SRIDHAR ; MHAISALKAR SUBODH ; ZHOU JIJIE</creatorcontrib><description>A protection layer is coated or otherwise formed over the interconnect structure. The interconnect structure includes a metal line (such as top and bottom metal layers connected by a metal via) and a low-K material. The protection layer includes a vertically aligned dielectric or other material dispersed with carbon nanotubes. The protection layer could include one or multiple layers of carbon nanotubes, and the carbon nanotubes could have any suitable dispersion, alignment, and pattern in each layer of the protection layer. Among other things, the carbon nanotubes help to reduce or prevent damage to the interconnect structure, such as by reducing or preventing the collapse of the low-K material or delamination between the metal line and the low-K material.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC ; GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS ; SEMICONDUCTOR DEVICES ; TECHNICAL SUBJECTS COVERED BY FORMER USPC ; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS ; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ARTCOLLECTIONS [XRACs] AND DIGESTS</subject><creationdate>2013</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20130716&DB=EPODOC&CC=US&NR=8486824B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20130716&DB=EPODOC&CC=US&NR=8486824B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>TEE TONG YAN</creatorcontrib><creatorcontrib>LOO ZHI YUAN SHANE</creatorcontrib><creatorcontrib>WANG SHANZHONG</creatorcontrib><creatorcontrib>ZHANG XUEREN</creatorcontrib><creatorcontrib>NOSIK VALERIY</creatorcontrib><creatorcontrib>IDAPALAPATI SRIDHAR</creatorcontrib><creatorcontrib>MHAISALKAR SUBODH</creatorcontrib><creatorcontrib>ZHOU JIJIE</creatorcontrib><title>Enhancing metal/low-K interconnect reliability using a protection layer</title><description>A protection layer is coated or otherwise formed over the interconnect structure. The interconnect structure includes a metal line (such as top and bottom metal layers connected by a metal via) and a low-K material. The protection layer includes a vertically aligned dielectric or other material dispersed with carbon nanotubes. The protection layer could include one or multiple layers of carbon nanotubes, and the carbon nanotubes could have any suitable dispersion, alignment, and pattern in each layer of the protection layer. Among other things, the carbon nanotubes help to reduce or prevent damage to the interconnect structure, such as by reducing or preventing the collapse of the low-K material or delamination between the metal line and the low-K material.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC</subject><subject>GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS</subject><subject>SEMICONDUCTOR DEVICES</subject><subject>TECHNICAL SUBJECTS COVERED BY FORMER USPC</subject><subject>TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS</subject><subject>TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ARTCOLLECTIONS [XRACs] AND DIGESTS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2013</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZHB3zctIzEvOzEtXyE0tSczRz8kv1_VWyMwrSS1Kzs_LS00uUShKzclMTMrMySypVCgtBilNVCgoyi8BymXm5ynkJFamFvEwsKYl5hSn8kJpbgYFN9cQZw_d1IL8-NTigsTk1LzUkvjQYAsTCzMLIxMnI2MilAAAJ9E0GA</recordid><startdate>20130716</startdate><enddate>20130716</enddate><creator>TEE TONG YAN</creator><creator>LOO ZHI YUAN SHANE</creator><creator>WANG SHANZHONG</creator><creator>ZHANG XUEREN</creator><creator>NOSIK VALERIY</creator><creator>IDAPALAPATI SRIDHAR</creator><creator>MHAISALKAR SUBODH</creator><creator>ZHOU JIJIE</creator><scope>EVB</scope></search><sort><creationdate>20130716</creationdate><title>Enhancing metal/low-K interconnect reliability using a protection layer</title><author>TEE TONG YAN ; LOO ZHI YUAN SHANE ; WANG SHANZHONG ; ZHANG XUEREN ; NOSIK VALERIY ; IDAPALAPATI SRIDHAR ; MHAISALKAR SUBODH ; ZHOU JIJIE</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US8486824B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2013</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC</topic><topic>GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS</topic><topic>SEMICONDUCTOR DEVICES</topic><topic>TECHNICAL SUBJECTS COVERED BY FORMER USPC</topic><topic>TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS</topic><topic>TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ARTCOLLECTIONS [XRACs] AND DIGESTS</topic><toplevel>online_resources</toplevel><creatorcontrib>TEE TONG YAN</creatorcontrib><creatorcontrib>LOO ZHI YUAN SHANE</creatorcontrib><creatorcontrib>WANG SHANZHONG</creatorcontrib><creatorcontrib>ZHANG XUEREN</creatorcontrib><creatorcontrib>NOSIK VALERIY</creatorcontrib><creatorcontrib>IDAPALAPATI SRIDHAR</creatorcontrib><creatorcontrib>MHAISALKAR SUBODH</creatorcontrib><creatorcontrib>ZHOU JIJIE</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>TEE TONG YAN</au><au>LOO ZHI YUAN SHANE</au><au>WANG SHANZHONG</au><au>ZHANG XUEREN</au><au>NOSIK VALERIY</au><au>IDAPALAPATI SRIDHAR</au><au>MHAISALKAR SUBODH</au><au>ZHOU JIJIE</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Enhancing metal/low-K interconnect reliability using a protection layer</title><date>2013-07-16</date><risdate>2013</risdate><abstract>A protection layer is coated or otherwise formed over the interconnect structure. The interconnect structure includes a metal line (such as top and bottom metal layers connected by a metal via) and a low-K material. The protection layer includes a vertically aligned dielectric or other material dispersed with carbon nanotubes. The protection layer could include one or multiple layers of carbon nanotubes, and the carbon nanotubes could have any suitable dispersion, alignment, and pattern in each layer of the protection layer. Among other things, the carbon nanotubes help to reduce or prevent damage to the interconnect structure, such as by reducing or preventing the collapse of the low-K material or delamination between the metal line and the low-K material.</abstract><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | |
ispartof | |
issn | |
language | eng |
recordid | cdi_epo_espacenet_US8486824B2 |
source | esp@cenet |
subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS SEMICONDUCTOR DEVICES TECHNICAL SUBJECTS COVERED BY FORMER USPC TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ARTCOLLECTIONS [XRACs] AND DIGESTS |
title | Enhancing metal/low-K interconnect reliability using a protection layer |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-03T20%3A20%3A53IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=TEE%20TONG%20YAN&rft.date=2013-07-16&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS8486824B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |