Modular multiplier apparatus with reduced critical path of arithmetic operation and method of reducing the critical path of arithmetic operation in arithmetic operation apparatus

Provided are a modular multiplier apparatus in which a value of a long path carry (LPC) is predicted to reduce a critical path of an arithmetic operation of Montgomery modular multiplication, and a method of reducing the critical path of the arithmetic operation. The modular multiplier apparatus for...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: AHN KYOUNG-MOON, KIM YOUNG-SIK, SHIN SUN-SOO, NOH MI-JUNG
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator AHN KYOUNG-MOON
KIM YOUNG-SIK
SHIN SUN-SOO
NOH MI-JUNG
description Provided are a modular multiplier apparatus in which a value of a long path carry (LPC) is predicted to reduce a critical path of an arithmetic operation of Montgomery modular multiplication, and a method of reducing the critical path of the arithmetic operation. The modular multiplier apparatus for obtaining a quotient and a result of an arithmetic operation of modular multiplication by using a modulus and two arbitrary constants includes: a reduction unit for obtaining a short path carry (SPC) included when a result of a modular arithmetic operation is obtained at a current stage, by using a medium calculation result; a carry predictor for predicting a long path carry (LPC) included when the result of the modular arithmetic operation is obtained at the current stage, by using the medium calculation result; and an accumulator for accumulating the result of the modular arithmetic operation by using the SPC and the LPC, wherein the medium calculation result is obtained by adding a result of a modular arithmetic operation obtained at a previous stage and a partial product of the two constants obtained at the current stage.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US8458242B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US8458242B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US8458242B23</originalsourceid><addsrcrecordid>eNqNjj0KAjEQhbexEPUOcwGbuMLWimJjpdbLkMyagWwy5Afv5QmNoqWw1YOP9z3evHmegykOI4zFZRbHFAFFMGIuCR6cLUQyRZMBHTmzRgeClYYBsAI7UoUQhKrBwQN6A5XZYN6Vj8v-DtnSxAH2f4Z_r5bNbECXaPXNRQPHw3V_WpOEnpKgJk-5v126dtupVu3UZkLlBT0WXR8</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Modular multiplier apparatus with reduced critical path of arithmetic operation and method of reducing the critical path of arithmetic operation in arithmetic operation apparatus</title><source>esp@cenet</source><creator>AHN KYOUNG-MOON ; KIM YOUNG-SIK ; SHIN SUN-SOO ; NOH MI-JUNG</creator><creatorcontrib>AHN KYOUNG-MOON ; KIM YOUNG-SIK ; SHIN SUN-SOO ; NOH MI-JUNG</creatorcontrib><description>Provided are a modular multiplier apparatus in which a value of a long path carry (LPC) is predicted to reduce a critical path of an arithmetic operation of Montgomery modular multiplication, and a method of reducing the critical path of the arithmetic operation. The modular multiplier apparatus for obtaining a quotient and a result of an arithmetic operation of modular multiplication by using a modulus and two arbitrary constants includes: a reduction unit for obtaining a short path carry (SPC) included when a result of a modular arithmetic operation is obtained at a current stage, by using a medium calculation result; a carry predictor for predicting a long path carry (LPC) included when the result of the modular arithmetic operation is obtained at the current stage, by using the medium calculation result; and an accumulator for accumulating the result of the modular arithmetic operation by using the SPC and the LPC, wherein the medium calculation result is obtained by adding a result of a modular arithmetic operation obtained at a previous stage and a partial product of the two constants obtained at the current stage.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2013</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20130604&amp;DB=EPODOC&amp;CC=US&amp;NR=8458242B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20130604&amp;DB=EPODOC&amp;CC=US&amp;NR=8458242B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>AHN KYOUNG-MOON</creatorcontrib><creatorcontrib>KIM YOUNG-SIK</creatorcontrib><creatorcontrib>SHIN SUN-SOO</creatorcontrib><creatorcontrib>NOH MI-JUNG</creatorcontrib><title>Modular multiplier apparatus with reduced critical path of arithmetic operation and method of reducing the critical path of arithmetic operation in arithmetic operation apparatus</title><description>Provided are a modular multiplier apparatus in which a value of a long path carry (LPC) is predicted to reduce a critical path of an arithmetic operation of Montgomery modular multiplication, and a method of reducing the critical path of the arithmetic operation. The modular multiplier apparatus for obtaining a quotient and a result of an arithmetic operation of modular multiplication by using a modulus and two arbitrary constants includes: a reduction unit for obtaining a short path carry (SPC) included when a result of a modular arithmetic operation is obtained at a current stage, by using a medium calculation result; a carry predictor for predicting a long path carry (LPC) included when the result of the modular arithmetic operation is obtained at the current stage, by using the medium calculation result; and an accumulator for accumulating the result of the modular arithmetic operation by using the SPC and the LPC, wherein the medium calculation result is obtained by adding a result of a modular arithmetic operation obtained at a previous stage and a partial product of the two constants obtained at the current stage.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2013</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNjj0KAjEQhbexEPUOcwGbuMLWimJjpdbLkMyagWwy5Afv5QmNoqWw1YOP9z3evHmegykOI4zFZRbHFAFFMGIuCR6cLUQyRZMBHTmzRgeClYYBsAI7UoUQhKrBwQN6A5XZYN6Vj8v-DtnSxAH2f4Z_r5bNbECXaPXNRQPHw3V_WpOEnpKgJk-5v126dtupVu3UZkLlBT0WXR8</recordid><startdate>20130604</startdate><enddate>20130604</enddate><creator>AHN KYOUNG-MOON</creator><creator>KIM YOUNG-SIK</creator><creator>SHIN SUN-SOO</creator><creator>NOH MI-JUNG</creator><scope>EVB</scope></search><sort><creationdate>20130604</creationdate><title>Modular multiplier apparatus with reduced critical path of arithmetic operation and method of reducing the critical path of arithmetic operation in arithmetic operation apparatus</title><author>AHN KYOUNG-MOON ; KIM YOUNG-SIK ; SHIN SUN-SOO ; NOH MI-JUNG</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US8458242B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2013</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>AHN KYOUNG-MOON</creatorcontrib><creatorcontrib>KIM YOUNG-SIK</creatorcontrib><creatorcontrib>SHIN SUN-SOO</creatorcontrib><creatorcontrib>NOH MI-JUNG</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>AHN KYOUNG-MOON</au><au>KIM YOUNG-SIK</au><au>SHIN SUN-SOO</au><au>NOH MI-JUNG</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Modular multiplier apparatus with reduced critical path of arithmetic operation and method of reducing the critical path of arithmetic operation in arithmetic operation apparatus</title><date>2013-06-04</date><risdate>2013</risdate><abstract>Provided are a modular multiplier apparatus in which a value of a long path carry (LPC) is predicted to reduce a critical path of an arithmetic operation of Montgomery modular multiplication, and a method of reducing the critical path of the arithmetic operation. The modular multiplier apparatus for obtaining a quotient and a result of an arithmetic operation of modular multiplication by using a modulus and two arbitrary constants includes: a reduction unit for obtaining a short path carry (SPC) included when a result of a modular arithmetic operation is obtained at a current stage, by using a medium calculation result; a carry predictor for predicting a long path carry (LPC) included when the result of the modular arithmetic operation is obtained at the current stage, by using the medium calculation result; and an accumulator for accumulating the result of the modular arithmetic operation by using the SPC and the LPC, wherein the medium calculation result is obtained by adding a result of a modular arithmetic operation obtained at a previous stage and a partial product of the two constants obtained at the current stage.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US8458242B2
source esp@cenet
subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title Modular multiplier apparatus with reduced critical path of arithmetic operation and method of reducing the critical path of arithmetic operation in arithmetic operation apparatus
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-07T13%3A37%3A26IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=AHN%20KYOUNG-MOON&rft.date=2013-06-04&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS8458242B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true