Method of forming openings in a semiconductor device and a semiconductor device fabricated by the method

A method of forming openings to a layer of a semiconductor device comprises forming a dielectric layer over the layer of the semiconductor device, and forming a mask over the dielectric layer. The mask comprises a plurality of mask openings arranged in a regular pattern extending over the dielectric...

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Hauptverfasser: WARRICK SCOTT, CONLEY WILL, AMINPUR MASSUD ABUBAKER, RIVIERE-CAZEAUX LIONEL
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creator WARRICK SCOTT
CONLEY WILL
AMINPUR MASSUD ABUBAKER
RIVIERE-CAZEAUX LIONEL
description A method of forming openings to a layer of a semiconductor device comprises forming a dielectric layer over the layer of the semiconductor device, and forming a mask over the dielectric layer. The mask comprises a plurality of mask openings arranged in a regular pattern extending over the dielectric layer and the plurality of mask openings include a plurality of first mask openings and a plurality of second mask openings, each of the plurality of first mask openings being greater in size than each of the plurality of second mask openings. The method further comprises reducing the size of the plurality of second mask openings such that each of the second mask openings is substantially closed and removing portions of the dielectric layer through the plurality of first mask openings to provide openings extending through the dielectric layer to the layer.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US8435874B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US8435874B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US8435874B23</originalsourceid><addsrcrecordid>eNqNjTEKAjEUBdNYiHqHfwEbd8WtXRQbK7Ve_iYvJmDyQxIFb6-IrWA1xQzMVLkjqhNDYslKDj5eSRLim4V8JKaC4LVEc9dVMhk8vAZxNL-U5TF7zRWGxidVBwqfw1xNLN8KFl_OFO135_6wRJIBJbFGRB0up65t1t2m3a6aP5IXYak_5g</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Method of forming openings in a semiconductor device and a semiconductor device fabricated by the method</title><source>esp@cenet</source><creator>WARRICK SCOTT ; CONLEY WILL ; AMINPUR MASSUD ABUBAKER ; RIVIERE-CAZEAUX LIONEL</creator><creatorcontrib>WARRICK SCOTT ; CONLEY WILL ; AMINPUR MASSUD ABUBAKER ; RIVIERE-CAZEAUX LIONEL</creatorcontrib><description>A method of forming openings to a layer of a semiconductor device comprises forming a dielectric layer over the layer of the semiconductor device, and forming a mask over the dielectric layer. The mask comprises a plurality of mask openings arranged in a regular pattern extending over the dielectric layer and the plurality of mask openings include a plurality of first mask openings and a plurality of second mask openings, each of the plurality of first mask openings being greater in size than each of the plurality of second mask openings. The method further comprises reducing the size of the plurality of second mask openings such that each of the second mask openings is substantially closed and removing portions of the dielectric layer through the plurality of first mask openings to provide openings extending through the dielectric layer to the layer.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2013</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20130507&amp;DB=EPODOC&amp;CC=US&amp;NR=8435874B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20130507&amp;DB=EPODOC&amp;CC=US&amp;NR=8435874B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>WARRICK SCOTT</creatorcontrib><creatorcontrib>CONLEY WILL</creatorcontrib><creatorcontrib>AMINPUR MASSUD ABUBAKER</creatorcontrib><creatorcontrib>RIVIERE-CAZEAUX LIONEL</creatorcontrib><title>Method of forming openings in a semiconductor device and a semiconductor device fabricated by the method</title><description>A method of forming openings to a layer of a semiconductor device comprises forming a dielectric layer over the layer of the semiconductor device, and forming a mask over the dielectric layer. The mask comprises a plurality of mask openings arranged in a regular pattern extending over the dielectric layer and the plurality of mask openings include a plurality of first mask openings and a plurality of second mask openings, each of the plurality of first mask openings being greater in size than each of the plurality of second mask openings. The method further comprises reducing the size of the plurality of second mask openings such that each of the second mask openings is substantially closed and removing portions of the dielectric layer through the plurality of first mask openings to provide openings extending through the dielectric layer to the layer.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2013</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNjTEKAjEUBdNYiHqHfwEbd8WtXRQbK7Ve_iYvJmDyQxIFb6-IrWA1xQzMVLkjqhNDYslKDj5eSRLim4V8JKaC4LVEc9dVMhk8vAZxNL-U5TF7zRWGxidVBwqfw1xNLN8KFl_OFO135_6wRJIBJbFGRB0up65t1t2m3a6aP5IXYak_5g</recordid><startdate>20130507</startdate><enddate>20130507</enddate><creator>WARRICK SCOTT</creator><creator>CONLEY WILL</creator><creator>AMINPUR MASSUD ABUBAKER</creator><creator>RIVIERE-CAZEAUX LIONEL</creator><scope>EVB</scope></search><sort><creationdate>20130507</creationdate><title>Method of forming openings in a semiconductor device and a semiconductor device fabricated by the method</title><author>WARRICK SCOTT ; CONLEY WILL ; AMINPUR MASSUD ABUBAKER ; RIVIERE-CAZEAUX LIONEL</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US8435874B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2013</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>WARRICK SCOTT</creatorcontrib><creatorcontrib>CONLEY WILL</creatorcontrib><creatorcontrib>AMINPUR MASSUD ABUBAKER</creatorcontrib><creatorcontrib>RIVIERE-CAZEAUX LIONEL</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>WARRICK SCOTT</au><au>CONLEY WILL</au><au>AMINPUR MASSUD ABUBAKER</au><au>RIVIERE-CAZEAUX LIONEL</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Method of forming openings in a semiconductor device and a semiconductor device fabricated by the method</title><date>2013-05-07</date><risdate>2013</risdate><abstract>A method of forming openings to a layer of a semiconductor device comprises forming a dielectric layer over the layer of the semiconductor device, and forming a mask over the dielectric layer. The mask comprises a plurality of mask openings arranged in a regular pattern extending over the dielectric layer and the plurality of mask openings include a plurality of first mask openings and a plurality of second mask openings, each of the plurality of first mask openings being greater in size than each of the plurality of second mask openings. The method further comprises reducing the size of the plurality of second mask openings such that each of the second mask openings is substantially closed and removing portions of the dielectric layer through the plurality of first mask openings to provide openings extending through the dielectric layer to the layer.</abstract><oa>free_for_read</oa></addata></record>
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subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title Method of forming openings in a semiconductor device and a semiconductor device fabricated by the method
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-28T17%3A54%3A48IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=WARRICK%20SCOTT&rft.date=2013-05-07&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS8435874B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true