On-chip memory testing

An integrated circuit is described that has a substrate with a memory array with dedicated support hardware formed on the substrate. An access wrapper circuit is coupled to address and data lines of the memory array and to control lines of the dedicated support hardware. The wrapper circuit is confi...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	PENDURTY HARI, BURGGRAF, III DANIEL ROBERT
Format:	Patent
Sprache:	eng
Schlagworte:	MEASURING MEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES PHYSICS TESTING
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