Low noise, high CMRR and PSRR input buffer

Low noise, high CMRR and PSRR input buffer

A rail-to-rail buffer receiving a differential input signal and generating a differential output signal includes first and second amplifier circuits configured in a pseudo differential buffer structure and first and second comparators coupled to compare the respective part of the differential input...

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Hauptverfasser: SRINIVAS THEERTHAM, KUMAR D V J RAVI, MAHESH K. KRISHNA, ASLAN MEHMET, GHORPADE GURURAJ
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Sprache:eng
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AMPLIFIERS
BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
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creator SRINIVAS THEERTHAM
KUMAR D V J RAVI
MAHESH K. KRISHNA
ASLAN MEHMET
GHORPADE GURURAJ
description A rail-to-rail buffer receiving a differential input signal and generating a differential output signal includes first and second amplifier circuits configured in a pseudo differential buffer structure and first and second comparators coupled to compare the respective part of the differential input signal and a first voltage and to generate select signals. Each of the first and second amplifier circuits includes first and second complementary differential input stages and the first and second comparators generate respective select signals to turn on only one of the first or the second differential input stage in each amplifier circuit depending on a value of the respective part of the differential input signal. In operation, the first and second complementary differential input stages of each amplifier circuit not being turned on at the same time.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US8330537B1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US8330537B1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US8330537B13</originalsourceid><addsrcrecordid>eNrjZNDyyS9XyMvPLE7VUcjITM9QcPYNClJIzEtRCAgGMjLzCkpLFJJK09JSi3gYWNMSc4pTeaE0N4OCm2uIs4duakF-fGpxQWJyal5qSXxosIWxsYGpsbmToTERSgAzNycv</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Low noise, high CMRR and PSRR input buffer</title><source>esp@cenet</source><creator>SRINIVAS THEERTHAM ; KUMAR D V J RAVI ; MAHESH K. KRISHNA ; ASLAN MEHMET ; GHORPADE GURURAJ</creator><creatorcontrib>SRINIVAS THEERTHAM ; KUMAR D V J RAVI ; MAHESH K. KRISHNA ; ASLAN MEHMET ; GHORPADE GURURAJ</creatorcontrib><description>A rail-to-rail buffer receiving a differential input signal and generating a differential output signal includes first and second amplifier circuits configured in a pseudo differential buffer structure and first and second comparators coupled to compare the respective part of the differential input signal and a first voltage and to generate select signals. Each of the first and second amplifier circuits includes first and second complementary differential input stages and the first and second comparators generate respective select signals to turn on only one of the first or the second differential input stage in each amplifier circuit depending on a value of the respective part of the differential input signal. In operation, the first and second complementary differential input stages of each amplifier circuit not being turned on at the same time.</description><language>eng</language><subject>AMPLIFIERS ; BASIC ELECTRONIC CIRCUITRY ; ELECTRICITY</subject><creationdate>2012</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20121211&amp;DB=EPODOC&amp;CC=US&amp;NR=8330537B1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25543,76294</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20121211&amp;DB=EPODOC&amp;CC=US&amp;NR=8330537B1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>SRINIVAS THEERTHAM</creatorcontrib><creatorcontrib>KUMAR D V J RAVI</creatorcontrib><creatorcontrib>MAHESH K. KRISHNA</creatorcontrib><creatorcontrib>ASLAN MEHMET</creatorcontrib><creatorcontrib>GHORPADE GURURAJ</creatorcontrib><title>Low noise, high CMRR and PSRR input buffer</title><description>A rail-to-rail buffer receiving a differential input signal and generating a differential output signal includes first and second amplifier circuits configured in a pseudo differential buffer structure and first and second comparators coupled to compare the respective part of the differential input signal and a first voltage and to generate select signals. Each of the first and second amplifier circuits includes first and second complementary differential input stages and the first and second comparators generate respective select signals to turn on only one of the first or the second differential input stage in each amplifier circuit depending on a value of the respective part of the differential input signal. In operation, the first and second complementary differential input stages of each amplifier circuit not being turned on at the same time.</description><subject>AMPLIFIERS</subject><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>ELECTRICITY</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2012</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZNDyyS9XyMvPLE7VUcjITM9QcPYNClJIzEtRCAgGMjLzCkpLFJJK09JSi3gYWNMSc4pTeaE0N4OCm2uIs4duakF-fGpxQWJyal5qSXxosIWxsYGpsbmToTERSgAzNycv</recordid><startdate>20121211</startdate><enddate>20121211</enddate><creator>SRINIVAS THEERTHAM</creator><creator>KUMAR D V J RAVI</creator><creator>MAHESH K. KRISHNA</creator><creator>ASLAN MEHMET</creator><creator>GHORPADE GURURAJ</creator><scope>EVB</scope></search><sort><creationdate>20121211</creationdate><title>Low noise, high CMRR and PSRR input buffer</title><author>SRINIVAS THEERTHAM ; KUMAR D V J RAVI ; MAHESH K. KRISHNA ; ASLAN MEHMET ; GHORPADE GURURAJ</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US8330537B13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2012</creationdate><topic>AMPLIFIERS</topic><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>ELECTRICITY</topic><toplevel>online_resources</toplevel><creatorcontrib>SRINIVAS THEERTHAM</creatorcontrib><creatorcontrib>KUMAR D V J RAVI</creatorcontrib><creatorcontrib>MAHESH K. KRISHNA</creatorcontrib><creatorcontrib>ASLAN MEHMET</creatorcontrib><creatorcontrib>GHORPADE GURURAJ</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>SRINIVAS THEERTHAM</au><au>KUMAR D V J RAVI</au><au>MAHESH K. KRISHNA</au><au>ASLAN MEHMET</au><au>GHORPADE GURURAJ</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Low noise, high CMRR and PSRR input buffer</title><date>2012-12-11</date><risdate>2012</risdate><abstract>A rail-to-rail buffer receiving a differential input signal and generating a differential output signal includes first and second amplifier circuits configured in a pseudo differential buffer structure and first and second comparators coupled to compare the respective part of the differential input signal and a first voltage and to generate select signals. Each of the first and second amplifier circuits includes first and second complementary differential input stages and the first and second comparators generate respective select signals to turn on only one of the first or the second differential input stage in each amplifier circuit depending on a value of the respective part of the differential input signal. In operation, the first and second complementary differential input stages of each amplifier circuit not being turned on at the same time.</abstract><oa>free_for_read</oa></addata></record>
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subjects AMPLIFIERS
BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
title Low noise, high CMRR and PSRR input buffer
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-22T01%3A04%3A40IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=SRINIVAS%20THEERTHAM&rft.date=2012-12-11&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS8330537B1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true