Apparatus for operating cache-inhibited memory mapped commands to access registers

In a multiprocessor environment, by executing cache-inhibited reads or writes to registers, a scan communication is used to rapidly access registers inside and outside a chip originating the command. Cumbersome locking of the memory location may be thus avoided. Setting of busy latches at the outset...

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Bibliographische Detailangaben

Hauptverfasser:	LEITNER LARRY SCOTT, REICK KEVIN FRANKLIN, FIELDS, JR. JAMES STEPHEN, FLOYS MICHAEL STEPHEN, LECOCQ PAUL FRANK
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
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