Programmable control block for dual port SRAM application

A dual-port static random access memory (SRAM) includes a multitude of programmable delay elements disposed along the paths of a number signals used to carry out read, write or read-then-write operations. At least one of the programmable delay elements controls the timing margin between a pair of cl...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
1. Verfasser: CHINGI CHANG CATHERINE
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!