Integrated structures of high performance active devices and passive devices

Integrated structures of high performance active devices and passive devices

Integrated structures having high performance CMOS active devices mounted on passive devices are provided. The structure includes an integrated passive device chip having a plurality of through wafer vias, mounted to a ground plane. The structure further includes at least one CMOS device mounted on...

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Hauptverfasser: STAMPER ANTHONY K, VANSLETTE DANIEL S, RASSEL ROBERT M
Format: Patent
Sprache:eng
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BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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creator STAMPER ANTHONY K
VANSLETTE DANIEL S
RASSEL ROBERT M
description Integrated structures having high performance CMOS active devices mounted on passive devices are provided. The structure includes an integrated passive device chip having a plurality of through wafer vias, mounted to a ground plane. The structure further includes at least one CMOS device mounted on the integrated passive device chip using flip chip technology and being grounded to the ground plane through the through wafer vias of the integrated passive device chip.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US8232139B1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US8232139B1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US8232139B13</originalsourceid><addsrcrecordid>eNrjZPDxzCtJTS9KLElNUSguKSpNLiktSi1WyE9TyMhMz1AoSC1Kyy_KTcxLTlVITC7JLEtVSEkty0wGKknMS1EoSCwuRhLjYWBNS8wpTuWF0twMCm6uIc4euqkF-fGpxQWJyal5qSXxocEWRsZGhsaWTobGRCgBAHOQNf0</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Integrated structures of high performance active devices and passive devices</title><source>esp@cenet</source><creator>STAMPER ANTHONY K ; VANSLETTE DANIEL S ; RASSEL ROBERT M</creator><creatorcontrib>STAMPER ANTHONY K ; VANSLETTE DANIEL S ; RASSEL ROBERT M</creatorcontrib><description>Integrated structures having high performance CMOS active devices mounted on passive devices are provided. The structure includes an integrated passive device chip having a plurality of through wafer vias, mounted to a ground plane. The structure further includes at least one CMOS device mounted on the integrated passive device chip using flip chip technology and being grounded to the ground plane through the through wafer vias of the integrated passive device chip.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2012</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20120731&amp;DB=EPODOC&amp;CC=US&amp;NR=8232139B1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20120731&amp;DB=EPODOC&amp;CC=US&amp;NR=8232139B1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>STAMPER ANTHONY K</creatorcontrib><creatorcontrib>VANSLETTE DANIEL S</creatorcontrib><creatorcontrib>RASSEL ROBERT M</creatorcontrib><title>Integrated structures of high performance active devices and passive devices</title><description>Integrated structures having high performance CMOS active devices mounted on passive devices are provided. The structure includes an integrated passive device chip having a plurality of through wafer vias, mounted to a ground plane. The structure further includes at least one CMOS device mounted on the integrated passive device chip using flip chip technology and being grounded to the ground plane through the through wafer vias of the integrated passive device chip.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2012</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZPDxzCtJTS9KLElNUSguKSpNLiktSi1WyE9TyMhMz1AoSC1Kyy_KTcxLTlVITC7JLEtVSEkty0wGKknMS1EoSCwuRhLjYWBNS8wpTuWF0twMCm6uIc4euqkF-fGpxQWJyal5qSXxocEWRsZGhsaWTobGRCgBAHOQNf0</recordid><startdate>20120731</startdate><enddate>20120731</enddate><creator>STAMPER ANTHONY K</creator><creator>VANSLETTE DANIEL S</creator><creator>RASSEL ROBERT M</creator><scope>EVB</scope></search><sort><creationdate>20120731</creationdate><title>Integrated structures of high performance active devices and passive devices</title><author>STAMPER ANTHONY K ; VANSLETTE DANIEL S ; RASSEL ROBERT M</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US8232139B13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2012</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>STAMPER ANTHONY K</creatorcontrib><creatorcontrib>VANSLETTE DANIEL S</creatorcontrib><creatorcontrib>RASSEL ROBERT M</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>STAMPER ANTHONY K</au><au>VANSLETTE DANIEL S</au><au>RASSEL ROBERT M</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Integrated structures of high performance active devices and passive devices</title><date>2012-07-31</date><risdate>2012</risdate><abstract>Integrated structures having high performance CMOS active devices mounted on passive devices are provided. The structure includes an integrated passive device chip having a plurality of through wafer vias, mounted to a ground plane. The structure further includes at least one CMOS device mounted on the integrated passive device chip using flip chip technology and being grounded to the ground plane through the through wafer vias of the integrated passive device chip.</abstract><oa>free_for_read</oa></addata></record>
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subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title Integrated structures of high performance active devices and passive devices
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-29T06%3A34%3A05IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=STAMPER%20ANTHONY%20K&rft.date=2012-07-31&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS8232139B1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true