Method for implementing functional changes into a design layout of an integrated device, in particular a system-on-chip, by means of mask programmable filling cells

A System-on-Chip (SoC) may include logic blocks connected to each other and to external connections, and a hardware debug infrastructure logic connected to the logic blocks and for performing functional changes to a design layout of the SoC. The hardware debug infrastructure logic may include softwa...

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Hauptverfasser:	STUCCHI STEFANIA, NARDONE VALENTINA, CALI LORENZO, CICCARELLI LUCA
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS BASIC ELECTRONIC CIRCUITRY CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY MEASURING MEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES PHYSICS PULSE TECHNIQUE SEMICONDUCTOR DEVICES TESTING
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creator	STUCCHI STEFANIA NARDONE VALENTINA CALI LORENZO CICCARELLI LUCA
description	A System-on-Chip (SoC) may include logic blocks connected to each other and to external connections, and a hardware debug infrastructure logic connected to the logic blocks and for performing functional changes to a design layout of the SoC. The hardware debug infrastructure logic may include software re-configurable modules based upon the logic blocks obtained from substituting a mask programmable ECO base cell configured as a functional logic cell for a logic cell in the design layout.
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title	Method for implementing functional changes into a design layout of an integrated device, in particular a system-on-chip, by means of mask programmable filling cells
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