Controller with indirect accessible memory

A controller has an interface, a buffer memory, a first set of registers for accessing the buffer memory, a second set of registers independent from the first set of registers for accessing the buffer memory, and a control unit for decoding and executing buffer memory access commands received by the...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: SCHLUNDER HOWARD HENRY, SIMMONS MICHAEL
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator SCHLUNDER HOWARD HENRY
SIMMONS MICHAEL
description A controller has an interface, a buffer memory, a first set of registers for accessing the buffer memory, a second set of registers independent from the first set of registers for accessing the buffer memory, and a control unit for decoding and executing buffer memory access commands received by the interface to access the buffer memory through either the first or second set of registers.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US8166213B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US8166213B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US8166213B23</originalsourceid><addsrcrecordid>eNrjZNByzs8rKcrPyUktUijPLMlQyMxLySxKTS5RSExOTi0uzkzKSVXITc3NL6rkYWBNS8wpTuWF0twMCm6uIc4euqkF-fGpxQWJyal5qSXxocEWhmZmRobGTkbGRCgBABFHKTI</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Controller with indirect accessible memory</title><source>esp@cenet</source><creator>SCHLUNDER HOWARD HENRY ; SIMMONS MICHAEL</creator><creatorcontrib>SCHLUNDER HOWARD HENRY ; SIMMONS MICHAEL</creatorcontrib><description>A controller has an interface, a buffer memory, a first set of registers for accessing the buffer memory, a second set of registers independent from the first set of registers for accessing the buffer memory, and a control unit for decoding and executing buffer memory access commands received by the interface to access the buffer memory through either the first or second set of registers.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2012</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20120424&amp;DB=EPODOC&amp;CC=US&amp;NR=8166213B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,777,882,25545,76296</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20120424&amp;DB=EPODOC&amp;CC=US&amp;NR=8166213B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>SCHLUNDER HOWARD HENRY</creatorcontrib><creatorcontrib>SIMMONS MICHAEL</creatorcontrib><title>Controller with indirect accessible memory</title><description>A controller has an interface, a buffer memory, a first set of registers for accessing the buffer memory, a second set of registers independent from the first set of registers for accessing the buffer memory, and a control unit for decoding and executing buffer memory access commands received by the interface to access the buffer memory through either the first or second set of registers.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2012</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZNByzs8rKcrPyUktUijPLMlQyMxLySxKTS5RSExOTi0uzkzKSVXITc3NL6rkYWBNS8wpTuWF0twMCm6uIc4euqkF-fGpxQWJyal5qSXxocEWhmZmRobGTkbGRCgBABFHKTI</recordid><startdate>20120424</startdate><enddate>20120424</enddate><creator>SCHLUNDER HOWARD HENRY</creator><creator>SIMMONS MICHAEL</creator><scope>EVB</scope></search><sort><creationdate>20120424</creationdate><title>Controller with indirect accessible memory</title><author>SCHLUNDER HOWARD HENRY ; SIMMONS MICHAEL</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US8166213B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2012</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>SCHLUNDER HOWARD HENRY</creatorcontrib><creatorcontrib>SIMMONS MICHAEL</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>SCHLUNDER HOWARD HENRY</au><au>SIMMONS MICHAEL</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Controller with indirect accessible memory</title><date>2012-04-24</date><risdate>2012</risdate><abstract>A controller has an interface, a buffer memory, a first set of registers for accessing the buffer memory, a second set of registers independent from the first set of registers for accessing the buffer memory, and a control unit for decoding and executing buffer memory access commands received by the interface to access the buffer memory through either the first or second set of registers.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US8166213B2
source esp@cenet
subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title Controller with indirect accessible memory
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-20T08%3A16%3A49IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=SCHLUNDER%20HOWARD%20HENRY&rft.date=2012-04-24&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS8166213B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true