Validating manufacturing test rules pertaining to an electronic component
The invention is directed to validating a specified manufacturing test rule, which pertains to an electronic component. The method includes generating a file of test data sets, wherein each test data set in the file is valid for the rule. Each test data set includes a stimulus comprising one or more...
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creator | WINEMILLER CHAD EVERETT MUHLADA MICHAEL PATRICK CASSANI CARISA ANNE GEROWITZ ROBERT GLEN |
description | The invention is directed to validating a specified manufacturing test rule, which pertains to an electronic component. The method includes generating a file of test data sets, wherein each test data set in the file is valid for the rule. Each test data set includes a stimulus comprising one or more single input vectors, and further includes a set of results that are expected. The method further comprises constructing a testbench to prepare testcases for simulation, wherein each testcase corresponds to the stimulus and the expected output results of one of the test data sets, and each testcase is disposed to be simulated separately, or independently, from every other testcase. The method further comprises selectively preparing each of the testcases for simulation, in order to provide simulated results for the stimulus corresponding to each testcase. The expected results and the simulated results are compared for each testcase. |
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fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US8135571B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US8135571B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US8135571B23</originalsourceid><addsrcrecordid>eNqNis0KwjAQBnPxINV32BfwUEvRs6LUsz_XsqxfJZBuQrJ5f1F8AE_DDLN0lwcH_2Tz-qKZtU4sVvPHDMUo14BCCdnY67dGYiUEiOWoXkjinKJCbeUWE4eC9Y-No_Ppdhw2SHFESSxQ2Hi_7tuu73ftYdv9sbwB4bA1Pg</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Validating manufacturing test rules pertaining to an electronic component</title><source>esp@cenet</source><creator>WINEMILLER CHAD EVERETT ; MUHLADA MICHAEL PATRICK ; CASSANI CARISA ANNE ; GEROWITZ ROBERT GLEN</creator><creatorcontrib>WINEMILLER CHAD EVERETT ; MUHLADA MICHAEL PATRICK ; CASSANI CARISA ANNE ; GEROWITZ ROBERT GLEN</creatorcontrib><description>The invention is directed to validating a specified manufacturing test rule, which pertains to an electronic component. The method includes generating a file of test data sets, wherein each test data set in the file is valid for the rule. Each test data set includes a stimulus comprising one or more single input vectors, and further includes a set of results that are expected. The method further comprises constructing a testbench to prepare testcases for simulation, wherein each testcase corresponds to the stimulus and the expected output results of one of the test data sets, and each testcase is disposed to be simulated separately, or independently, from every other testcase. The method further comprises selectively preparing each of the testcases for simulation, in order to provide simulated results for the stimulus corresponding to each testcase. The expected results and the simulated results are compared for each testcase.</description><language>eng</language><subject>ANALOGUE COMPUTERS ; CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2012</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20120313&DB=EPODOC&CC=US&NR=8135571B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25562,76317</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20120313&DB=EPODOC&CC=US&NR=8135571B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>WINEMILLER CHAD EVERETT</creatorcontrib><creatorcontrib>MUHLADA MICHAEL PATRICK</creatorcontrib><creatorcontrib>CASSANI CARISA ANNE</creatorcontrib><creatorcontrib>GEROWITZ ROBERT GLEN</creatorcontrib><title>Validating manufacturing test rules pertaining to an electronic component</title><description>The invention is directed to validating a specified manufacturing test rule, which pertains to an electronic component. The method includes generating a file of test data sets, wherein each test data set in the file is valid for the rule. Each test data set includes a stimulus comprising one or more single input vectors, and further includes a set of results that are expected. The method further comprises constructing a testbench to prepare testcases for simulation, wherein each testcase corresponds to the stimulus and the expected output results of one of the test data sets, and each testcase is disposed to be simulated separately, or independently, from every other testcase. The method further comprises selectively preparing each of the testcases for simulation, in order to provide simulated results for the stimulus corresponding to each testcase. The expected results and the simulated results are compared for each testcase.</description><subject>ANALOGUE COMPUTERS</subject><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2012</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNis0KwjAQBnPxINV32BfwUEvRs6LUsz_XsqxfJZBuQrJ5f1F8AE_DDLN0lwcH_2Tz-qKZtU4sVvPHDMUo14BCCdnY67dGYiUEiOWoXkjinKJCbeUWE4eC9Y-No_Ppdhw2SHFESSxQ2Hi_7tuu73ftYdv9sbwB4bA1Pg</recordid><startdate>20120313</startdate><enddate>20120313</enddate><creator>WINEMILLER CHAD EVERETT</creator><creator>MUHLADA MICHAEL PATRICK</creator><creator>CASSANI CARISA ANNE</creator><creator>GEROWITZ ROBERT GLEN</creator><scope>EVB</scope></search><sort><creationdate>20120313</creationdate><title>Validating manufacturing test rules pertaining to an electronic component</title><author>WINEMILLER CHAD EVERETT ; MUHLADA MICHAEL PATRICK ; CASSANI CARISA ANNE ; GEROWITZ ROBERT GLEN</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US8135571B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2012</creationdate><topic>ANALOGUE COMPUTERS</topic><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>WINEMILLER CHAD EVERETT</creatorcontrib><creatorcontrib>MUHLADA MICHAEL PATRICK</creatorcontrib><creatorcontrib>CASSANI CARISA ANNE</creatorcontrib><creatorcontrib>GEROWITZ ROBERT GLEN</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>WINEMILLER CHAD EVERETT</au><au>MUHLADA MICHAEL PATRICK</au><au>CASSANI CARISA ANNE</au><au>GEROWITZ ROBERT GLEN</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Validating manufacturing test rules pertaining to an electronic component</title><date>2012-03-13</date><risdate>2012</risdate><abstract>The invention is directed to validating a specified manufacturing test rule, which pertains to an electronic component. The method includes generating a file of test data sets, wherein each test data set in the file is valid for the rule. Each test data set includes a stimulus comprising one or more single input vectors, and further includes a set of results that are expected. The method further comprises constructing a testbench to prepare testcases for simulation, wherein each testcase corresponds to the stimulus and the expected output results of one of the test data sets, and each testcase is disposed to be simulated separately, or independently, from every other testcase. The method further comprises selectively preparing each of the testcases for simulation, in order to provide simulated results for the stimulus corresponding to each testcase. The expected results and the simulated results are compared for each testcase.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | ANALOGUE COMPUTERS CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
title | Validating manufacturing test rules pertaining to an electronic component |
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