Duty ratio correction circuit and duty ratio correction method
A duty ratio correction circuit includes a clock input buffer that receives a first clock signal, a clock duty adjuster that adjusts a duty ratio of a second clock signal output from the clock input buffer based on a correction signal and generates a third clock signal, a data input buffer that rece...
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Format: | Patent |
Sprache: | eng |
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Zusammenfassung: | A duty ratio correction circuit includes a clock input buffer that receives a first clock signal, a clock duty adjuster that adjusts a duty ratio of a second clock signal output from the clock input buffer based on a correction signal and generates a third clock signal, a data input buffer that receives a first data signal, a data duty adjuster that adjusts a duty ratio of a second data signal output from the data input buffer based on the correction signal and generates a third data signal, and a duty comparator that generates the correction signal based on the third clock signal. |
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