Method and system to monitor, debug, and analyze performance of an electronic design

Various methods and apparatuses are described that provide instrumentation and analysis of an electronic design. A performance monitoring apparatus may be located on an interconnect of a fabricated integrated circuit. An event measurement module (EM) includes an event generator sub-module that gener...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: CHAUVET PASCAL, CHOU CHIENUN, HAMILTON STEPHEN W, WINGARD DREW E
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator CHAUVET PASCAL
CHOU CHIENUN
HAMILTON STEPHEN W
WINGARD DREW E
description Various methods and apparatuses are described that provide instrumentation and analysis of an electronic design. A performance monitoring apparatus may be located on an interconnect of a fabricated integrated circuit. An event measurement module (EM) includes an event generator sub-module that generates monitoring events and event measurements associated with transactions between initiator intellectual property (IP) cores and target IP cores over the interconnect. The EM further includes a software visible register block that provides software access for controlling the EM on which one or more transactions to monitor and to configure one or more parameters associated with that transaction to track. The EM further includes a filtering sub-module that selects transactions to be monitored based on information received from the software. The performance counter module aggregates events and event measurements received from the EM into quantities of performance metrics associated with transactions between the IP cores over the interconnect.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US8032329B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US8032329B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US8032329B23</originalsourceid><addsrcrecordid>eNqNi7EKwjAURbM4iPoP7wMqSLLoqiguTta5xPSmLSR5IYlD_XqD-AFOF845dynaG8rIPenQU55zgafC5DlMhVNDPZ6voflaHbSb36CIZDl5HQyIbcUEB1NSvZja52kIa7Gw2mVsfrsSdDm3p-sWkTvkqA0CSve473dKKnk4SvVH8gHfjzgF</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Method and system to monitor, debug, and analyze performance of an electronic design</title><source>esp@cenet</source><creator>CHAUVET PASCAL ; CHOU CHIENUN ; HAMILTON STEPHEN W ; WINGARD DREW E</creator><creatorcontrib>CHAUVET PASCAL ; CHOU CHIENUN ; HAMILTON STEPHEN W ; WINGARD DREW E</creatorcontrib><description>Various methods and apparatuses are described that provide instrumentation and analysis of an electronic design. A performance monitoring apparatus may be located on an interconnect of a fabricated integrated circuit. An event measurement module (EM) includes an event generator sub-module that generates monitoring events and event measurements associated with transactions between initiator intellectual property (IP) cores and target IP cores over the interconnect. The EM further includes a software visible register block that provides software access for controlling the EM on which one or more transactions to monitor and to configure one or more parameters associated with that transaction to track. The EM further includes a filtering sub-module that selects transactions to be monitored based on information received from the software. The performance counter module aggregates events and event measurements received from the EM into quantities of performance metrics associated with transactions between the IP cores over the interconnect.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2011</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20111004&amp;DB=EPODOC&amp;CC=US&amp;NR=8032329B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20111004&amp;DB=EPODOC&amp;CC=US&amp;NR=8032329B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>CHAUVET PASCAL</creatorcontrib><creatorcontrib>CHOU CHIENUN</creatorcontrib><creatorcontrib>HAMILTON STEPHEN W</creatorcontrib><creatorcontrib>WINGARD DREW E</creatorcontrib><title>Method and system to monitor, debug, and analyze performance of an electronic design</title><description>Various methods and apparatuses are described that provide instrumentation and analysis of an electronic design. A performance monitoring apparatus may be located on an interconnect of a fabricated integrated circuit. An event measurement module (EM) includes an event generator sub-module that generates monitoring events and event measurements associated with transactions between initiator intellectual property (IP) cores and target IP cores over the interconnect. The EM further includes a software visible register block that provides software access for controlling the EM on which one or more transactions to monitor and to configure one or more parameters associated with that transaction to track. The EM further includes a filtering sub-module that selects transactions to be monitored based on information received from the software. The performance counter module aggregates events and event measurements received from the EM into quantities of performance metrics associated with transactions between the IP cores over the interconnect.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2011</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNi7EKwjAURbM4iPoP7wMqSLLoqiguTta5xPSmLSR5IYlD_XqD-AFOF845dynaG8rIPenQU55zgafC5DlMhVNDPZ6voflaHbSb36CIZDl5HQyIbcUEB1NSvZja52kIa7Gw2mVsfrsSdDm3p-sWkTvkqA0CSve473dKKnk4SvVH8gHfjzgF</recordid><startdate>20111004</startdate><enddate>20111004</enddate><creator>CHAUVET PASCAL</creator><creator>CHOU CHIENUN</creator><creator>HAMILTON STEPHEN W</creator><creator>WINGARD DREW E</creator><scope>EVB</scope></search><sort><creationdate>20111004</creationdate><title>Method and system to monitor, debug, and analyze performance of an electronic design</title><author>CHAUVET PASCAL ; CHOU CHIENUN ; HAMILTON STEPHEN W ; WINGARD DREW E</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US8032329B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2011</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>CHAUVET PASCAL</creatorcontrib><creatorcontrib>CHOU CHIENUN</creatorcontrib><creatorcontrib>HAMILTON STEPHEN W</creatorcontrib><creatorcontrib>WINGARD DREW E</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>CHAUVET PASCAL</au><au>CHOU CHIENUN</au><au>HAMILTON STEPHEN W</au><au>WINGARD DREW E</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Method and system to monitor, debug, and analyze performance of an electronic design</title><date>2011-10-04</date><risdate>2011</risdate><abstract>Various methods and apparatuses are described that provide instrumentation and analysis of an electronic design. A performance monitoring apparatus may be located on an interconnect of a fabricated integrated circuit. An event measurement module (EM) includes an event generator sub-module that generates monitoring events and event measurements associated with transactions between initiator intellectual property (IP) cores and target IP cores over the interconnect. The EM further includes a software visible register block that provides software access for controlling the EM on which one or more transactions to monitor and to configure one or more parameters associated with that transaction to track. The EM further includes a filtering sub-module that selects transactions to be monitored based on information received from the software. The performance counter module aggregates events and event measurements received from the EM into quantities of performance metrics associated with transactions between the IP cores over the interconnect.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US8032329B2
source esp@cenet
subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title Method and system to monitor, debug, and analyze performance of an electronic design
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-02T05%3A55%3A33IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=CHAUVET%20PASCAL&rft.date=2011-10-04&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS8032329B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true