Semiconductor device and method of fabricating the same
In a semiconductor device and related method of fabricating the same, a hard mask layer is formed over a substrate, portions of the hard mask layer and the substrate are etched to form trenches having protruding portions at sidewalls, and an insulation layer buried in the trenches is formed to form...
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creator | LEE KYEONG-HYO CHO YONG-TAE LEE HAE-JUNG KIM EUN-MI |
description | In a semiconductor device and related method of fabricating the same, a hard mask layer is formed over a substrate, portions of the hard mask layer and the substrate are etched to form trenches having protruding portions at sidewalls, and an insulation layer buried in the trenches is formed to form device isolation regions having protruding portions at sidewalls, wherein the device isolation regions decrease a portion of a width of active regions. |
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fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US8003485B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US8003485B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US8003485B23</originalsourceid><addsrcrecordid>eNrjZDAPTs3NTM7PSylNLskvUkhJLctMTlVIzEtRyE0tychPUchPU0hLTCrKTE4sycxLVyjJSFUoTsxN5WFgTUvMKU7lhdLcDApuriHOHrqpBfnxqcUFicmpeakl8aHBFgYGxiYWpk5GxkQoAQByQy2B</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Semiconductor device and method of fabricating the same</title><source>esp@cenet</source><creator>LEE KYEONG-HYO ; CHO YONG-TAE ; LEE HAE-JUNG ; KIM EUN-MI</creator><creatorcontrib>LEE KYEONG-HYO ; CHO YONG-TAE ; LEE HAE-JUNG ; KIM EUN-MI</creatorcontrib><description>In a semiconductor device and related method of fabricating the same, a hard mask layer is formed over a substrate, portions of the hard mask layer and the substrate are etched to form trenches having protruding portions at sidewalls, and an insulation layer buried in the trenches is formed to form device isolation regions having protruding portions at sidewalls, wherein the device isolation regions decrease a portion of a width of active regions.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2011</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20110823&DB=EPODOC&CC=US&NR=8003485B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25563,76418</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20110823&DB=EPODOC&CC=US&NR=8003485B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>LEE KYEONG-HYO</creatorcontrib><creatorcontrib>CHO YONG-TAE</creatorcontrib><creatorcontrib>LEE HAE-JUNG</creatorcontrib><creatorcontrib>KIM EUN-MI</creatorcontrib><title>Semiconductor device and method of fabricating the same</title><description>In a semiconductor device and related method of fabricating the same, a hard mask layer is formed over a substrate, portions of the hard mask layer and the substrate are etched to form trenches having protruding portions at sidewalls, and an insulation layer buried in the trenches is formed to form device isolation regions having protruding portions at sidewalls, wherein the device isolation regions decrease a portion of a width of active regions.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2011</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDAPTs3NTM7PSylNLskvUkhJLctMTlVIzEtRyE0tychPUchPU0hLTCrKTE4sycxLVyjJSFUoTsxN5WFgTUvMKU7lhdLcDApuriHOHrqpBfnxqcUFicmpeakl8aHBFgYGxiYWpk5GxkQoAQByQy2B</recordid><startdate>20110823</startdate><enddate>20110823</enddate><creator>LEE KYEONG-HYO</creator><creator>CHO YONG-TAE</creator><creator>LEE HAE-JUNG</creator><creator>KIM EUN-MI</creator><scope>EVB</scope></search><sort><creationdate>20110823</creationdate><title>Semiconductor device and method of fabricating the same</title><author>LEE KYEONG-HYO ; CHO YONG-TAE ; LEE HAE-JUNG ; KIM EUN-MI</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US8003485B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2011</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>LEE KYEONG-HYO</creatorcontrib><creatorcontrib>CHO YONG-TAE</creatorcontrib><creatorcontrib>LEE HAE-JUNG</creatorcontrib><creatorcontrib>KIM EUN-MI</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>LEE KYEONG-HYO</au><au>CHO YONG-TAE</au><au>LEE HAE-JUNG</au><au>KIM EUN-MI</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Semiconductor device and method of fabricating the same</title><date>2011-08-23</date><risdate>2011</risdate><abstract>In a semiconductor device and related method of fabricating the same, a hard mask layer is formed over a substrate, portions of the hard mask layer and the substrate are etched to form trenches having protruding portions at sidewalls, and an insulation layer buried in the trenches is formed to form device isolation regions having protruding portions at sidewalls, wherein the device isolation regions decrease a portion of a width of active regions.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | Semiconductor device and method of fabricating the same |
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