Device and method for controlling an execution of a DMA task
A method for controlling an execution of a first DMA task, the method includes comprises monitoring an execution of the first DMA task, the method characterized by including defining a first DMA task execution interval and a first DMA task execution sub-interval; and performing a first possible timi...
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| creator | SHASHA URI HASSID GILAD KAHN ERAN GURFINKEL SAGI |
| description | A method for controlling an execution of a first DMA task, the method includes comprises monitoring an execution of the first DMA task, the method characterized by including defining a first DMA task execution interval and a first DMA task execution sub-interval; and performing a first possible timing violation responsive operation if the first DMA task was not completed during the first DMA task execution sub-interval. A device having a first DMA task controlling capabilities, the device includes a memory unit; characterized by including a DMA controller that is adapted to monitor an execution of the first DMA task that involves an access to the memory unit, and to perform a first possible timing violation responsive operation if the first DMA task was not completed during a first DMA task execution sub-interval. |
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| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US8001430B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US8001430B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US8001430B23</originalsourceid><addsrcrecordid>eNrjZLBxSS3LTE5VSMxLUchNLcnIT1FIyy9SSM7PKynKz8nJzEsHSimkVqQml5Zk5ucp5KcpJCq4-DoqlCQWZ_MwsKYl5hSn8kJpbgYFN9cQZw_d1IL8-NTigsTk1LzUkvjQYAsDA0MTYwMnI2MilAAAHpwuaQ</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Device and method for controlling an execution of a DMA task</title><source>esp@cenet</source><creator>SHASHA URI ; HASSID GILAD ; KAHN ERAN ; GURFINKEL SAGI</creator><creatorcontrib>SHASHA URI ; HASSID GILAD ; KAHN ERAN ; GURFINKEL SAGI</creatorcontrib><description>A method for controlling an execution of a first DMA task, the method includes comprises monitoring an execution of the first DMA task, the method characterized by including defining a first DMA task execution interval and a first DMA task execution sub-interval; and performing a first possible timing violation responsive operation if the first DMA task was not completed during the first DMA task execution sub-interval. A device having a first DMA task controlling capabilities, the device includes a memory unit; characterized by including a DMA controller that is adapted to monitor an execution of the first DMA task that involves an access to the memory unit, and to perform a first possible timing violation responsive operation if the first DMA task was not completed during a first DMA task execution sub-interval.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2011</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20110816&DB=EPODOC&CC=US&NR=8001430B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20110816&DB=EPODOC&CC=US&NR=8001430B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>SHASHA URI</creatorcontrib><creatorcontrib>HASSID GILAD</creatorcontrib><creatorcontrib>KAHN ERAN</creatorcontrib><creatorcontrib>GURFINKEL SAGI</creatorcontrib><title>Device and method for controlling an execution of a DMA task</title><description>A method for controlling an execution of a first DMA task, the method includes comprises monitoring an execution of the first DMA task, the method characterized by including defining a first DMA task execution interval and a first DMA task execution sub-interval; and performing a first possible timing violation responsive operation if the first DMA task was not completed during the first DMA task execution sub-interval. A device having a first DMA task controlling capabilities, the device includes a memory unit; characterized by including a DMA controller that is adapted to monitor an execution of the first DMA task that involves an access to the memory unit, and to perform a first possible timing violation responsive operation if the first DMA task was not completed during a first DMA task execution sub-interval.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2011</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLBxSS3LTE5VSMxLUchNLcnIT1FIyy9SSM7PKynKz8nJzEsHSimkVqQml5Zk5ucp5KcpJCq4-DoqlCQWZ_MwsKYl5hSn8kJpbgYFN9cQZw_d1IL8-NTigsTk1LzUkvjQYAsDA0MTYwMnI2MilAAAHpwuaQ</recordid><startdate>20110816</startdate><enddate>20110816</enddate><creator>SHASHA URI</creator><creator>HASSID GILAD</creator><creator>KAHN ERAN</creator><creator>GURFINKEL SAGI</creator><scope>EVB</scope></search><sort><creationdate>20110816</creationdate><title>Device and method for controlling an execution of a DMA task</title><author>SHASHA URI ; HASSID GILAD ; KAHN ERAN ; GURFINKEL SAGI</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US8001430B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2011</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>SHASHA URI</creatorcontrib><creatorcontrib>HASSID GILAD</creatorcontrib><creatorcontrib>KAHN ERAN</creatorcontrib><creatorcontrib>GURFINKEL SAGI</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>SHASHA URI</au><au>HASSID GILAD</au><au>KAHN ERAN</au><au>GURFINKEL SAGI</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Device and method for controlling an execution of a DMA task</title><date>2011-08-16</date><risdate>2011</risdate><abstract>A method for controlling an execution of a first DMA task, the method includes comprises monitoring an execution of the first DMA task, the method characterized by including defining a first DMA task execution interval and a first DMA task execution sub-interval; and performing a first possible timing violation responsive operation if the first DMA task was not completed during the first DMA task execution sub-interval. A device having a first DMA task controlling capabilities, the device includes a memory unit; characterized by including a DMA controller that is adapted to monitor an execution of the first DMA task that involves an access to the memory unit, and to perform a first possible timing violation responsive operation if the first DMA task was not completed during a first DMA task execution sub-interval.</abstract><oa>free_for_read</oa></addata></record> |
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| subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
| title | Device and method for controlling an execution of a DMA task |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-08T11%3A53%3A34IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=SHASHA%20URI&rft.date=2011-08-16&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS8001430B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |