Interrupt handling using simultaneous multi-threading
Disclosed are a method, information processing system, and computer readable medium for managing interrupts. The method includes placing at least one physical processor of an information processing system in a simultaneous multi-threading mode. At least a first logical processor and a second logical...
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creator | GOVINDARAJU RAMA K BLACKMORE ROBERT S HOCHSCHILD PETER H |
description | Disclosed are a method, information processing system, and computer readable medium for managing interrupts. The method includes placing at least one physical processor of an information processing system in a simultaneous multi-threading mode. At least a first logical processor and a second logical processor associated with the at least one physical processor are partitioned. The first logical processor is assigned to manage interrupts and the second logical processor is assigned to dispatch runnable user threads. |
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fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US7996593B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US7996593B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US7996593B23</originalsourceid><addsrcrecordid>eNrjZDD1zCtJLSoqLShRyEjMS8nJzEtXKC0GkcWZuaU5JYl5qfmlxQogZqZuSUZRamIKUJKHgTUtMac4lRdKczMouLmGOHvophbkx6cWFyQmp-allsSHBptbWpqZWho7GRkToQQAfVQt_Q</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Interrupt handling using simultaneous multi-threading</title><source>esp@cenet</source><creator>GOVINDARAJU RAMA K ; BLACKMORE ROBERT S ; HOCHSCHILD PETER H</creator><creatorcontrib>GOVINDARAJU RAMA K ; BLACKMORE ROBERT S ; HOCHSCHILD PETER H</creatorcontrib><description>Disclosed are a method, information processing system, and computer readable medium for managing interrupts. The method includes placing at least one physical processor of an information processing system in a simultaneous multi-threading mode. At least a first logical processor and a second logical processor associated with the at least one physical processor are partitioned. The first logical processor is assigned to manage interrupts and the second logical processor is assigned to dispatch runnable user threads.</description><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2011</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20110809&DB=EPODOC&CC=US&NR=7996593B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,777,882,25545,76296</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20110809&DB=EPODOC&CC=US&NR=7996593B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>GOVINDARAJU RAMA K</creatorcontrib><creatorcontrib>BLACKMORE ROBERT S</creatorcontrib><creatorcontrib>HOCHSCHILD PETER H</creatorcontrib><title>Interrupt handling using simultaneous multi-threading</title><description>Disclosed are a method, information processing system, and computer readable medium for managing interrupts. The method includes placing at least one physical processor of an information processing system in a simultaneous multi-threading mode. At least a first logical processor and a second logical processor associated with the at least one physical processor are partitioned. The first logical processor is assigned to manage interrupts and the second logical processor is assigned to dispatch runnable user threads.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2011</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDD1zCtJLSoqLShRyEjMS8nJzEtXKC0GkcWZuaU5JYl5qfmlxQogZqZuSUZRamIKUJKHgTUtMac4lRdKczMouLmGOHvophbkx6cWFyQmp-allsSHBptbWpqZWho7GRkToQQAfVQt_Q</recordid><startdate>20110809</startdate><enddate>20110809</enddate><creator>GOVINDARAJU RAMA K</creator><creator>BLACKMORE ROBERT S</creator><creator>HOCHSCHILD PETER H</creator><scope>EVB</scope></search><sort><creationdate>20110809</creationdate><title>Interrupt handling using simultaneous multi-threading</title><author>GOVINDARAJU RAMA K ; BLACKMORE ROBERT S ; HOCHSCHILD PETER H</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US7996593B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2011</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>GOVINDARAJU RAMA K</creatorcontrib><creatorcontrib>BLACKMORE ROBERT S</creatorcontrib><creatorcontrib>HOCHSCHILD PETER H</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>GOVINDARAJU RAMA K</au><au>BLACKMORE ROBERT S</au><au>HOCHSCHILD PETER H</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Interrupt handling using simultaneous multi-threading</title><date>2011-08-09</date><risdate>2011</risdate><abstract>Disclosed are a method, information processing system, and computer readable medium for managing interrupts. The method includes placing at least one physical processor of an information processing system in a simultaneous multi-threading mode. At least a first logical processor and a second logical processor associated with the at least one physical processor are partitioned. The first logical processor is assigned to manage interrupts and the second logical processor is assigned to dispatch runnable user threads.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
title | Interrupt handling using simultaneous multi-threading |
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