Low power, single-ended sensing in a multi-port SRAM using pre-discharged bit lines

An apparatus and method for low power, single-ended sensing in a multi-port static random access memory (SRAM) using pre-discharged bit lines includes holding a bit line associated with the memory cell at a zero voltage potential when the memory cell is not being accessed; releasing the bit line from being held at a zero voltage potential when the memory cell is being accessed; charging the bit line to a first voltage potential greater in value than the zero voltage potential during an access of the memory cell, wherein charging the bit line to a first voltage potential occurs for a first predetermined period of time after access to the memory cell has begun; and sensing the memory cell contents during an access of the memory cell, wherein sensing of the memory cell contents occurs for a second predetermined period of time after access to the memory cell has begun.