BIST DDR memory interface circuit and method for testing the same

An apparatus and method for self-testing a DDR memory interface are disclosed. In one aspect, a built-in-self-test (BIST) memory interface circuit includes a signal multiplier for receiving a first clock signal from a tester and outputs a multiplied clock signal. A first multiplexer is used for sele...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	JARBOE, JR. JAMES MICHAEL, AGRAWAL VINAY, NAYAK NEERAJ P, PANIGRAHI SUKANTA KISHORE
Format:	Patent
Sprache:	eng
Schlagworte:	INFORMATION STORAGE MEASURING MEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES PHYSICS STATIC STORES TESTING
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