Hybrid transistor based power gating switch circuit and method

A method includes forming a first transistor having a first gate dielectric thickness and a first source/drain extension depth, a second transistor having a second gate dielectric thickness and the first source/drain extension depth, and a third transistor having the second gate dielectric thickness...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	BOOTH ROBERT E, WOO MICHAEL P, DAVAR SUSHAMA, NALLAPATI GIRI, RASHED MAHBUB M
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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