Sealing board and method for producing the same

There is provided a sealing board (30) for sealing a container containing an electronic component, constituted of a base which is made of a material exhibiting a low wettability to a brazing filler metal (31) and on a surface of which a metal layer exhibiting a high wettability to the brazing filler...

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Hauptverfasser: HIRATSUKA HARUYUKI, KASAI TAKAO
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creator HIRATSUKA HARUYUKI
KASAI TAKAO
description There is provided a sealing board (30) for sealing a container containing an electronic component, constituted of a base which is made of a material exhibiting a low wettability to a brazing filler metal (31) and on a surface of which a metal layer exhibiting a high wettability to the brazing filler metal (31) is formed, a brazing filler metal portion formed on the metal layer to form a closed region, and an exposed portion in which a surface of the base is exposed in at least a part of the closed region. By making at least a part of the sealing board as the exposed portion, it is possible to produce the sealing board with the brazing filler metal for a package stable in quality and inexpensively.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US7842891B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US7842891B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US7842891B23</originalsourceid><addsrcrecordid>eNrjZNAPTk3MycxLV0jKTyxKUUjMS1HITS3JyE9RSMsvUigoyk8pTQZJl2SkKhQn5qbyMLCmJeYUp_JCaW4GBTfXEGcP3dSC_PjU4oLE5NS81JL40GBzCxMjC0tDJyNjIpQAAKyhKk4</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Sealing board and method for producing the same</title><source>esp@cenet</source><creator>HIRATSUKA HARUYUKI ; KASAI TAKAO</creator><creatorcontrib>HIRATSUKA HARUYUKI ; KASAI TAKAO</creatorcontrib><description>There is provided a sealing board (30) for sealing a container containing an electronic component, constituted of a base which is made of a material exhibiting a low wettability to a brazing filler metal (31) and on a surface of which a metal layer exhibiting a high wettability to the brazing filler metal (31) is formed, a brazing filler metal portion formed on the metal layer to form a closed region, and an exposed portion in which a surface of the base is exposed in at least a part of the closed region. By making at least a part of the sealing board as the exposed portion, it is possible to produce the sealing board with the brazing filler metal for a package stable in quality and inexpensively.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; BASIC ELECTRONIC CIRCUITRY ; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC ; GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS ; IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS ; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ; PRINTED CIRCUITS ; RESONATORS ; SEMICONDUCTOR DEVICES ; TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION ; TECHNICAL SUBJECTS COVERED BY FORMER USPC ; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS</subject><creationdate>2010</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20101130&amp;DB=EPODOC&amp;CC=US&amp;NR=7842891B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20101130&amp;DB=EPODOC&amp;CC=US&amp;NR=7842891B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>HIRATSUKA HARUYUKI</creatorcontrib><creatorcontrib>KASAI TAKAO</creatorcontrib><title>Sealing board and method for producing the same</title><description>There is provided a sealing board (30) for sealing a container containing an electronic component, constituted of a base which is made of a material exhibiting a low wettability to a brazing filler metal (31) and on a surface of which a metal layer exhibiting a high wettability to the brazing filler metal (31) is formed, a brazing filler metal portion formed on the metal layer to form a closed region, and an exposed portion in which a surface of the base is exposed in at least a part of the closed region. By making at least a part of the sealing board as the exposed portion, it is possible to produce the sealing board with the brazing filler metal for a package stable in quality and inexpensively.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC</subject><subject>GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS</subject><subject>IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS</subject><subject>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</subject><subject>PRINTED CIRCUITS</subject><subject>RESONATORS</subject><subject>SEMICONDUCTOR DEVICES</subject><subject>TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION</subject><subject>TECHNICAL SUBJECTS COVERED BY FORMER USPC</subject><subject>TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2010</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZNAPTk3MycxLV0jKTyxKUUjMS1HITS3JyE9RSMsvUigoyk8pTQZJl2SkKhQn5qbyMLCmJeYUp_JCaW4GBTfXEGcP3dSC_PjU4oLE5NS81JL40GBzCxMjC0tDJyNjIpQAAKyhKk4</recordid><startdate>20101130</startdate><enddate>20101130</enddate><creator>HIRATSUKA HARUYUKI</creator><creator>KASAI TAKAO</creator><scope>EVB</scope></search><sort><creationdate>20101130</creationdate><title>Sealing board and method for producing the same</title><author>HIRATSUKA HARUYUKI ; KASAI TAKAO</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US7842891B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2010</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC</topic><topic>GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS</topic><topic>IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS</topic><topic>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</topic><topic>PRINTED CIRCUITS</topic><topic>RESONATORS</topic><topic>SEMICONDUCTOR DEVICES</topic><topic>TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION</topic><topic>TECHNICAL SUBJECTS COVERED BY FORMER USPC</topic><topic>TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS</topic><toplevel>online_resources</toplevel><creatorcontrib>HIRATSUKA HARUYUKI</creatorcontrib><creatorcontrib>KASAI TAKAO</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>HIRATSUKA HARUYUKI</au><au>KASAI TAKAO</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Sealing board and method for producing the same</title><date>2010-11-30</date><risdate>2010</risdate><abstract>There is provided a sealing board (30) for sealing a container containing an electronic component, constituted of a base which is made of a material exhibiting a low wettability to a brazing filler metal (31) and on a surface of which a metal layer exhibiting a high wettability to the brazing filler metal (31) is formed, a brazing filler metal portion formed on the metal layer to form a closed region, and an exposed portion in which a surface of the base is exposed in at least a part of the closed region. By making at least a part of the sealing board as the exposed portion, it is possible to produce the sealing board with the brazing filler metal for a package stable in quality and inexpensively.</abstract><oa>free_for_read</oa></addata></record>
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subjects BASIC ELECTRIC ELEMENTS
BASIC ELECTRONIC CIRCUITRY
CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC
GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS
IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS
MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
PRINTED CIRCUITS
RESONATORS
SEMICONDUCTOR DEVICES
TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
TECHNICAL SUBJECTS COVERED BY FORMER USPC
TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
title Sealing board and method for producing the same
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-03T15%3A40%3A54IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=HIRATSUKA%20HARUYUKI&rft.date=2010-11-30&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS7842891B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true