Semiconductor device alleviating or preventing surge voltage
When an insulated gate bipolar transistor turned on starts to transition to turn off, the insulated gate bipolar transistor has between the emitter and the collector a surge voltage caused in proportion to the magnitude of a current gradient provided when a current flowing through a coil in switchin...
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creator | OMARU TAKESHI |
description | When an insulated gate bipolar transistor turned on starts to transition to turn off, the insulated gate bipolar transistor has between the emitter and the collector a surge voltage caused in proportion to the magnitude of a current gradient provided when a current flowing through a coil in switching is interrupted and an electrode interconnect inductance internal to an inverter circuit. A MOS transistor is temporarily turned on within a period of time for which the insulated gate bipolar transistor turned on transitions to turn off. This can bypass a portion of the current to the MOS transistor. This can provide an alleviated apparent current gradient of the current and thus alleviate or prevent a surge voltage caused at the insulated gate bipolar transistor. |
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fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US7830196B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US7830196B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US7830196B23</originalsourceid><addsrcrecordid>eNrjZLAJTs3NTM7PSylNLskvUkhJLctMTlVIzMkBMhJLMvPSFYCiBUWpZal5YF5xaVF6qkJZfk5JYnoqDwNrWmJOcSovlOZmUHBzDXH20E0tyI9PLS5ITE7NSy2JDw02tzA2MLQ0czIyJkIJAOU6MFM</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Semiconductor device alleviating or preventing surge voltage</title><source>esp@cenet</source><creator>OMARU TAKESHI</creator><creatorcontrib>OMARU TAKESHI</creatorcontrib><description>When an insulated gate bipolar transistor turned on starts to transition to turn off, the insulated gate bipolar transistor has between the emitter and the collector a surge voltage caused in proportion to the magnitude of a current gradient provided when a current flowing through a coil in switching is interrupted and an electrode interconnect inductance internal to an inverter circuit. A MOS transistor is temporarily turned on within a period of time for which the insulated gate bipolar transistor turned on transitions to turn off. This can bypass a portion of the current to the MOS transistor. This can provide an alleviated apparent current gradient of the current and thus alleviate or prevent a surge voltage caused at the insulated gate bipolar transistor.</description><language>eng</language><subject>BASIC ELECTRONIC CIRCUITRY ; ELECTRICITY ; PULSE TECHNIQUE</subject><creationdate>2010</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20101109&DB=EPODOC&CC=US&NR=7830196B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25543,76293</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20101109&DB=EPODOC&CC=US&NR=7830196B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>OMARU TAKESHI</creatorcontrib><title>Semiconductor device alleviating or preventing surge voltage</title><description>When an insulated gate bipolar transistor turned on starts to transition to turn off, the insulated gate bipolar transistor has between the emitter and the collector a surge voltage caused in proportion to the magnitude of a current gradient provided when a current flowing through a coil in switching is interrupted and an electrode interconnect inductance internal to an inverter circuit. A MOS transistor is temporarily turned on within a period of time for which the insulated gate bipolar transistor turned on transitions to turn off. This can bypass a portion of the current to the MOS transistor. This can provide an alleviated apparent current gradient of the current and thus alleviate or prevent a surge voltage caused at the insulated gate bipolar transistor.</description><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>ELECTRICITY</subject><subject>PULSE TECHNIQUE</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2010</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLAJTs3NTM7PSylNLskvUkhJLctMTlVIzMkBMhJLMvPSFYCiBUWpZal5YF5xaVF6qkJZfk5JYnoqDwNrWmJOcSovlOZmUHBzDXH20E0tyI9PLS5ITE7NSy2JDw02tzA2MLQ0czIyJkIJAOU6MFM</recordid><startdate>20101109</startdate><enddate>20101109</enddate><creator>OMARU TAKESHI</creator><scope>EVB</scope></search><sort><creationdate>20101109</creationdate><title>Semiconductor device alleviating or preventing surge voltage</title><author>OMARU TAKESHI</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US7830196B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2010</creationdate><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>ELECTRICITY</topic><topic>PULSE TECHNIQUE</topic><toplevel>online_resources</toplevel><creatorcontrib>OMARU TAKESHI</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>OMARU TAKESHI</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Semiconductor device alleviating or preventing surge voltage</title><date>2010-11-09</date><risdate>2010</risdate><abstract>When an insulated gate bipolar transistor turned on starts to transition to turn off, the insulated gate bipolar transistor has between the emitter and the collector a surge voltage caused in proportion to the magnitude of a current gradient provided when a current flowing through a coil in switching is interrupted and an electrode interconnect inductance internal to an inverter circuit. A MOS transistor is temporarily turned on within a period of time for which the insulated gate bipolar transistor turned on transitions to turn off. This can bypass a portion of the current to the MOS transistor. This can provide an alleviated apparent current gradient of the current and thus alleviate or prevent a surge voltage caused at the insulated gate bipolar transistor.</abstract><oa>free_for_read</oa></addata></record> |
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subjects | BASIC ELECTRONIC CIRCUITRY ELECTRICITY PULSE TECHNIQUE |
title | Semiconductor device alleviating or preventing surge voltage |
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